• Title/Summary/Keyword: amorphous Si

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Magnetic Properties of Co-Cr(-Ta)/Si Bilayered Thin Film (Co-Cr(-Ta)/Si 이층막의 자기적 특성)

  • 김용진;박원효;금민종;최형욱;김경환;손인환
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.3
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    • pp.281-286
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    • 2002
  • In odder to investigate the magnetic properties of CoCr-based bilayered thin films on kind of underlayer, we introduced amorphous Si layer to Co-Cr(-Ta) magnetic layer as underlayer. First, we prepared CoCr and CoCrTa single layer using the Facing Targets Sputtering system to investigate theirs properties. It was revealed that with increasing the film thickness of CoCr, CoCrTa single layer, crystalline orientation and perpendicular coercivity was improved. The CoCrTa thin film showed bettor crystalline and magnetic characteristics than CoCr thin film. As a result of investigating magnetic properties of CoCr and CoCrTa magnetic layer on introducing the Si underlayer, perpendicular coercivity and saturation magnetization of CoCr/Si and CoCrTa/Si bilayered thin film were decreased due to the increased grain size and diffusion of Si atoms to magnetic layer. And they showed constant with increasing the film thickness of Si thin film. However, in case of CoCrTa/Si bilayered thin film, in-plane coercivity was controlled low at about 250Oe. The c-axis orientations of CoCr/si and CoCrTa/Si bilayered thin film showed a good crystalline characteristics as about $2^{\circ}$.

Effects of Stress Mismatch on the Electrical Characteristics of Amorphous Silicon TFTs for Active-Matrix LCDs

  • Lee, Yeong-Shyang;Chang, Jun-Kai;Lin, Chiung-Wei;Shih, Ching-Chieh;Tsai, Chien-Chien;Fang, Kuo-Lung;Lin, Hun-Tu;Gan, Feng-Yuan
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.729-732
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    • 2006
  • The effect of stress match between silicon nitride ($SiN_2$) and hydrogenated amorphous silicon (a-Si:H) layers on the electrical characteristics of thin-film transistors (TFTs) has been investigated. The result shows that modifying the deposition conditions of a Si:H and $SiN_2$ thin films can reduce the stress mismatch at a-Si:H/SiNx interface. Moreover, for best a-Si:H TFT characteristics, the internal stress of gate $SiN_2$ layer with slightly nitrogen-rich should be matched with that of a-Si:H channel layer. The ON current, field-effect mobility, and stability of TFTs can be enhanced by controlling the stress match between a-Si:H and gate insulator. The improvement of these characteristics appears to be due to both the decrease of the interface state density between the a-Si:H and SiNx layer, and the good dielectric quality of the bottom nitride layer.

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High Mobility Thin-Film Transistors using amorphous IGZO-SnO2 Stacked Channel Layers

  • Lee, Gi-Yong;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.258-258
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    • 2016
  • 최근 디스플레이 산업의 발전에 따라 고성능 디스플레이가 요구되며, 디스플레이의 백플레인 (backplane) TFT (thin film transistor) 구동속도를 증가시키기 위한 연구가 활발히 진행되고 있다. 트랜지스터의 구동속도를 증가시키기 위해 높은 이동도는 중요한 요소 중 하나이다. 그러나, 기존 백플레인 TFT에 주로 사용된 amorphous silicon (a-Si)은 대면적화가 용이하며 가격이 저렴하지만, 이동도가 낮다는 (< $1cm2/V{\cdot}s$) 단점이 있다. 따라서 전기적 특성이 우수한 산화물 반도체가 기존의 a-Si의 대체 물질로써 각광받고 있다. 산화물 반도체는 비정질 상태임에도 불구하고 a-Si에 비해 이동도 (> $10cm2/V{\cdot}s$)가 높고, 가시광 영역에서 투명하며 저온에서 공정이 가능하다는 장점이 있다. 하지만, 차세대 디스플레이 백플레인에서는 더 높은 이동도 (> $30cm2/V{\cdot}s$)를 가지는 TFT가 요구된다. 따라서, 본 연구에서는 차세대 디스플레이에서 요구되는 높은 이동도를 갖는 TFT를 제작하기 위하여, amorphous In-Ga-Zn-O (a-IGZO) 채널하부에 화학적으로 안정하고 전도성이 뛰어난 SnO2 채널을 얇게 형성하여 TFT를 제작하였다. 표준 RCA 세정을 통하여 p-type Si 기판을 세정한 후, 열산화 공정을 거쳐서 두께 100 nm의 SiO2 게이트 절연막을 형성하였다. 본 연구에서 제안된 적층된 채널을 형성하기 위하여 5 nm 두계의 SnO2 층을 RF 스퍼터를 이용하여 증착하였으며, 순차적으로 a-IGZO 층을 65 nm의 두께로 증착하였다. 그 후, 소스/드레인 영역은 e-beam evaporator를 이용하여 Ti와 Al을 각각 5 nm와 120 nm의 두께로 증착하였다. 후속 열처리는 퍼니스로 N2 분위기에서 $600^{\circ}C$의 온도로 30 분 동안 실시하였다. 제작된 소자에 대하여 TFT의 전달 및 출력 특성을 비교한 결과, SnO2 층을 형성한 TFT에서 더 뛰어난 전달 및 출력 특성을 나타내었으며 이동도는 $8.7cm2/V{\cdot}s$에서 $70cm2/V{\cdot}s$로 크게 향상되는 것을 확인하였다. 결과적으로, 채널층 하부에 SnO2 층을 형성하는 방법은 추후 높은 이동도를 요구하는 디스플레이 백플레인 TFT 제작에 적용이 가능할 것으로 기대된다.

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Effect of Sputtering Power on the Change of Total Interfacial Trap States of SiZnSnO Thin Film Transistor

  • Ko, Kyung-Min;Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.15 no.6
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    • pp.328-332
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    • 2014
  • Thin film transistors (TFTs) with an amorphous silicon zinc tin oxide (a-2SZTO) channel layer have been fabricated using an RF magnetron sputtering system. The effect of the change of excitation electron on the variation of the total interfacial trap states of a-2SZTO systems was investigated depending on sputtering power, since the interfacial state could be changed by changing sputtering power. It is well known that Si can effectively reduce the generation of the oxygen vacancies. However, The a-2SZTO systems of ZTO doped with 2 wt% Si could be degraded because the Si peripheral electron belonging to a p-orbital affects the amorphous zinc tin oxide (a-ZTO) TFTs of the s-orbital overlap structure. We fabricated amorphous 2 wt% Si-doped ZnSnO (a-2SZTO) TFTs using an RF magnetron sputtering system. The a-2SZTO TFTs show an improvement of the electrical property with increasing power. The a-2SZTO TFTs fabricated at a power of 30 W showed many of the total interfacial trap states. The a-2SZTO TFTs at a power of 30 W showed poor electrical property. However, at 50 W power, the total interfacial trap states showed improvement. In addition, the improved total interfacial states affected the thermal stress of a-2SZTO TFTs. Therefore, a-2SZTO TFTs fabricated at 50 W power showed a relatively small shift of threshold voltage. Similarly, the activation energy of a-2SZTO TFTs fabricated at 50 W power exhibits a relatively large falling rate (0.0475 eV/V) with a relatively high activation energy, which means that the a-2SZTO TFTs fabricated at 50 W power has a relatively lower trap density than other power cases. As a result, the electrical characteristics of a-2SZTO TFTs fabricated at a sputtering power of 50 W are enhanced. The TFTs fabricated by rf sputter should be carefully optimized to provide better stability for a-2SZTO in terms of the sputtering power, which is closely related to the interfacial trap states.

Electrical Characterization of Amorphous Zn-Sn-O Transistors Deposited through RF-Sputtering

  • Choi, Jeong-Wan;Kim, Eui-Hyun;Kwon, Kyeong-Woo;Hwang, Jin-Ha
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.304.1-304.1
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    • 2014
  • Flat-panel displays have been growing as an essential everyday product in the current information/communication ages in the unprecedented speed. The forward-coming applications require light-weightness, higher speed, higher resolution, and lower power consumption, along with the relevant cost. Such specifications demand for a new concept-based materials and applications, unlike Si-based technologies, such as amorphous Si and polycrystalline Si thin film transistors. Since the introduction of the first concept on the oxide-based thin film transistors by Hosono et al., amorphous oxide thin film transistors have been gaining academic/industrial interest, owing to the facile synthesis and reproducible processing despite of a couple of shortcomings. The current work places its main emphasis on the binary oxides composed of ZnO and SnO2. RF sputtering was applied to the fabrication of amorphous oxide thin film devices, in the form of bottom-gated structures involving highly-doped Si wafers as gate materials and thermal oxide (SiO2) as gate dielectrics. The physical/chemical features were characterized using atomic force microscopy for surface morphology, spectroscopic ellipsometry for optical parameters, X-ray diffraction for crystallinity, and X-ray photoelectron spectroscopy for identification of chemical states. The combined characterizations on Zn-Sn-O thin films are discussed in comparison with the device performance based on thin film transistors involving Zn-Sn-O thin films as channel materials, with the aim to optimizing high-performance thin film transistors.

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Process and Performance Analysis of a-Si:H/c-Si Hetero-junction Solar Sells Prepared by Low Temperature Processes (저온 공정에 의한 a-Si:H/c-Si 이종접합 태양전지 제조 및 동작특성 분석)

  • Lim, Chung-Hyun;Lee, Jeong-Chul;Jeon, Sang-Won;Kim, Sang-Kyun;Kim, Seok-Ki;Kim, Dong-Seop;Yang-Sumi;Kang-Hee-Bok;Lee, Bo-young;Song-Jinsoo;Yoon-Kyung-Hoon
    • 한국신재생에너지학회:학술대회논문집
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    • 2005.06a
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    • pp.196-200
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    • 2005
  • In this work, we investigated simple Aㅣ/TCO/a-Si:H(n)/c-Si(p)/Al hetero-junction solar cells prepared by low temperature processes, unlike conventional thermal diffused c-Si solar cells. a-Si:H/c-Si hetero-junction solar cells are processed by low temperature deposition of n-type hydrogenated amorphous silicon (a-Si:H) films by plasma-enhanced chemical vapor deposition on textured and flat p-type silicon substrate. A detailed investigation was carried out to acquire optimization and compatibility of amorphous layer, TCO (ZnO:Al) layer depositions by changing the plasma process parameters. As front TCO and back contact, ZnO:Al and AI were deposited by rf magnetron sputtering and e-beam evaporation, respectively. The photovoltaic conversion efficiency under AMI.5 and the quantum efficiency on $1cm^2$ sample have been reported. An efficiency of $12.5\%$ is achieved on hetero-structure solar cells based on p-type crystalline silicon.

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A Novel Analysis Of Amorphous/Crystalline Silicon Heterojunction Solar Cells Using Spectroscopic Ellipsometer (Spectroscopic Ellipsometer를 이용한 a-Si:H/c-Si 이종접합 태양전지 박막 분석)

  • Ji, Kwang-Sun;Eo, Young-Ju;Kim, Bum-Sung;Lee, Heon-Min;Lee, Don-Hee
    • 한국신재생에너지학회:학술대회논문집
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    • 2008.05a
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    • pp.378-381
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    • 2008
  • 고효율 a-Si:H/c-Si 이종접합 태양전지를 얻기 위해서는 우수한 c-Si wafer 위에 고품질의 비정질 실리콘박막을 통한 heterointerface를 형성하는 것이 매우 중요하다. 이를 달성하기 위해서는 공정중에 오염되기 쉬운 Si wafer 표면 상태를 정확히 검사하고 잘 관리하여야 한다. 본 연구에서는 세정 및 표면산화에 따른 Si wafer 상태를 Spectroscopic Ellipsometry 및 u-PCD를 이용하여 분석하였으며, <$\varepsilon$2> @4.25eV 값이 Si wafer 상태를 잘 나타내고 있음을 확인하였고 세정 최적화 할 경우 그 값이 43.02에 도달하였다. 또한 RF-PECVD로 증착된a-Si:H 박막을 EMA 모델링을 통해 분석한 결과 낮은 결정성과 높은 밀도를 가지는 a-Si:H를 얻을 수 있었으며, 이를 이종접합 태양전지에 적용한 결과 Flat wafer상에서 10.88%, textured wafer 적용하여 13.23%의 변환효율을 얻었다. 결론적으로 Spectroscopic Ellipsometry가 매우 얇고 고품질의 다층 박막이 필요한 이종접합 태양전지 분석에 있어 매우 유용한 방법임이 확인되었다.

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A study on wafer surface passivation properties using hydrogenated amorphous silicon thin film (수소화된 비정질 실리콘 박막을 이용한 웨이퍼 패시베이션 특성 연구)

  • Lee, Seungjik;Kim, Kihyung;Oh, Donghae;Ahn, Hwanggi
    • 한국신재생에너지학회:학술대회논문집
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    • 2010.11a
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    • pp.46.1-46.1
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    • 2010
  • Surface passivation of crystalline silicon(c-Si) surface with a-Si:H thin films has been investigated by using quasi-steady-state photo conductance(QSSPC) measurements. Analyzing the influence of a-Si:H film thickness, process gas ratio, deposition temperature and post annealing temperature on the passivation properties of c-Si, we optimized the passivation conditions at the substrate temperature of $200-250^{\circ}C$. Best surface passivation has been obtained by post-deposition annealing of a-Si:H film layer. Post annealing around the deposition temperature was sufficient to improve the surface passivation for silicon substrates. We obtained effective carrier lifetimes above 5.5 ms on average.

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열처리에 따른 a-IGZO 소자의 전기적 특성과 조성 분포

  • Gang, Ji-Yeon;Lee, Tae-Il;Myeong, Jae-Min
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2011.10a
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    • pp.43.1-43.1
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    • 2011
  • Hydrogenated amorphous Si (a-Si:H), low temperature poly Si (LTPS) 등 기존 thin film transistors (TFTs)에 사용되던 채널 물질을 대체할 재료로써 다양한 연구가 진행되고 있는 amorphous indium-gallium-zinc-oxide (a-IGZO)는 TFT에 적용하였을 때 뛰어난 전기적 특성과 재연성을 나타낼 뿐만 아니라 넓은 밴드갭을 가져 투명소자로도 응용이 가능하다. 본 연구에서는 a-IGZO의 열처리에 따른 소자의 전기적 특성과 조성 분포의 관계를 확인하기 위해 다음과 같이 실험을 진행하였다. Si/SiO2 기판 위에 DC sputter를 이용하여 IGZO를 증착하고 $350^{\circ}C$에서 열처리를 한 후 evaporator로 Al 전극을 형성시켰다. 이 때 전기적 특성의 변화를 비교하기 위해 열처리 한 샘플과 열처리 하지 않은 샘플에 대해 I-V 특성을 측정하였고, 채널 내부의 조성 분포 변화를 transmission electron microscopy (TEM)의 energy dispersive spectrometer (EDS)를 이용하여 관찰하였다. 그 결과 열처리 된 a-IGZO 채널 층의 산소 비율이 감소하였으며 전체적인 조성이 고르게 분포 되었고 전기적 특성은 향상되었다.

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Hydrogen concentration and critical epitaxial thicknesses in low-temperature Si(001) layers grown by UHV ion-beam sputter deposition.

  • Lee, Nae-Eung
    • Journal of Korean Vacuum Science & Technology
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    • v.3 no.2
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    • pp.139-144
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    • 1999
  • Hydrogen concentration depth profiles in homoepitaxial Si(001) films grown from hyper-thermal Si beams generated by ultrahigh vacuum (UHV) ion-beam sputtering have been measured by nuclear reaction analyses as a function of film growth temperature and deposition rate. Bulk H concentrations CH in the crystalline Si layers were found tio be below detection limits, 1${\times}$1019cm-3, with no indication of significant H surface segregation at the crystalline/amorphous interface region. This is quite different than the case for growth by molecular-beam epitaxy (MBE) where strong surface segregation was observed for similar deposition conditions with average CH values of 1${\times}$1020cm-3 in the amorphous overlayer. The markedly decreased H concentrations in the present experiments are due primarily to hydrogen desorption by incident hyperthermal Si atoms. Reduced H surface coverages during growth combined with collisionally-induced filling of interisland trenches and enhanced interlayer mass transport provide an increase in critical epitaxial thicknesses by up to an order of magnitude over previous MBE results.

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