• Title/Summary/Keyword: addressing

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Studies on High Speed Addressing Driving Scheme using the Priming Effect in Plasma Display Panel (하전 입자 효과를 이용한 Plasma Display Panel의 고속 구동 파형에 관한 연구)

  • Shin, Bhum-Jae;Park, Sang-Sik
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.23 no.2
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    • pp.45-52
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    • 2009
  • This study is related to the realization of high speed address driving method for Full-HD PDP. The new self-priming addressing(SPA) driving scheme was proposed to improve an address discharge time lag, which utilizes the priming effect maintaining the priming discharge during an address period. In this study, the basic characteristics of the priming ramp discharge were investigated and optimize the reset pulse and priming pulse. It is noted that the address discharge time lag is significantly improved from 1.2[${\mu}s$] to 0.8[${\mu}s$] when the slope of the priming ramp pulse is below 0.1[$V/{\mu}s$].

The Study of Addressing Time and Electrical and Optical Characteristics as Phosphor Thickness and Height of discharge Space in ac-PDP (형광체 두께와 방전공간의 변화에 따른 ac PDP의 어드레싱 속도와 전기광학적 특성에 관한 연구)

  • Heo, Jeong-Eun;Kim, Gyu-Seup;Park, Jung-Hoo;Cho, Jung-Soo
    • Proceedings of the KIEE Conference
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    • 2000.07c
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    • pp.1815-1817
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    • 2000
  • Plasma display Panels(PDPs) are one of the leading technologies currently under development for large-area high-brightness flat panel displays. However, the luminance and luminous efficiency of at PDPs should be improved. Especially, one of the main factors affecting on the luminance and luminous efficiency of ac PDP may be the phosphor thickness and size of discharge space. In this study, we examined into addressing time, electrical and optical properties as a parameter of the phosphor thickness and the size of discharge space during the display period of ac PDP. It is found out that the optimum phosphor thickness was $50{\mu}m$ and height of discharge space was about $100{\mu}m$.

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A charged particles layer control and driving of Charged Particle Type Display (대전입자형 디스플레이의 대전입자층 제어와 구동)

  • Lee, Dong-Jin;Kim, Young-Cho
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.8 no.6
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    • pp.1376-1380
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    • 2007
  • The charged particle type display have characteristics of high contrast ratio and wide viewing angle, quick response time. We used the yellow(-) and the black(+) colored particles, which is respectively addressed to the cells of upper and rear panel by using electric field. Our independent addressing method has strong points compared to the mixed particle putting method. After addressing, we packaged two panels and did aging process, and then panel is driven by matrix method of four channel electrodes. Layers of particles are controlled by height of cell barriers and needed minimum two layers. When positive voltage is applied to the upper electrode, the yellow particles with negative charge move toward the upper substrate and the black particles with positive charge move toward opposite direction.

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Advanced Architecture using DIAM for Improved Performance of Embedded Processor (임베디드 프로세서의 성능 향상을 위한 DIAM의 진보한 아키텍처)

  • Youn, Jong-Hee;Shin, Se-Chul;Baek, You-Heung;Cho, Jeong-hun
    • The KIPS Transactions:PartA
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    • v.16A no.6
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    • pp.443-452
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    • 2009
  • Although 32-bit architectures are becoming the norm for modern microprocessors, 16-bit ones are still employed by many low-end processors, for which small size and low power consumption are of high priority. However, 16-bit architectures have a critical disadvantage for embedded processors that they do not provide enough encoding space to add special instructions coined for certain applications. To overcome this, many existing architectures adopt non-orthogonal, irregular instruction sets to accommodate a variety of unusual addressing modes. In general, these non-orthogonal architectures are regarded compiler-unfriendly as they tend to requires extremely sophisticated compiler techniques for optimal code generation. To address this issue, we proposed a compiler-friendly processor with a new addressing mode, called the dynamic implied addressing mode(DIAM). In this paper, we will demonstrate that the DIAM provides more encoding space for our 16-bit processor so that we are able to support more instructions specially customized for our applications. And we will explain the advanced architecture which has improved performance. In our experiment, the proposed architecture shows 11.6% performance increase on average, as compared to the basic architecture.