• 한국전기전자재료학회논문지
• /
• 제13권7호
• /
• pp.575-582
• /
• 2000

The Electrical conduction and optical properties of Ta$_{2}$/O$_{5}$ thin films as the insulators in DRAM capacitors were studied. Liquid Ta/sib 2//O sub 5/ were prepared by a sol-gel processing and multiple layers were applied by spin-coating up to thickness of 800$\AA$. At annealing temperature of 300~$600^{\circ}C$ the electrical conduction and specific dielectric constant were discussed the behaivor of carrier were observed by the Thermally Stimulated Current (TSC) at the temperature range of 30~23$0^{\circ}C$. At annealing temperature of 300~$600^{\circ}C$ the samples were found to be amorphous below $600^{\circ}C$ and crystalline over it. The electrical strength was about 2.2 MV/cm at 40$0^{\circ}C$. In spite of noncrystallization over 50$0^{\circ}C$ the increasing of leakage current due to pinholes and increasing creak. The refractive index was obtained maximum (2.2) at 40$0^{\circ}C$. The dielectric constant was obtained maximum(18.6) at 40$0^{\circ}C$. TSC was observed one peak at the temperature range of 30~23$0^{\circ}C$ from sample at 40$0^{\circ}C$. In the case of collecting voltage the peak size is decreased in proportion to collecting voltage and then the peak may be thought carrier to be a ionic space charge.e.

• 한국주조공학회지
• /
• 제25권6호
• /
• pp.259-264
• /
• 2005

The copper clad steel wire is used extensively as lead wires of electronic components such as capacitors, diodes and glass sealing lamp because the wire combines the strength and low thermal expansion characteristic of Fe-Ni steel with the conductivity and corrosion resistance of copper. In order to fabricate the copper clad steel wire, several processes including electro-plating, tubecladding extrusion process and dip forming process have been introduced and applied. The electroplating process for the production of copper clad steel wire shows poor productivity and induces environmental load generation such as electroplating solution. The dip forming process is suitable to mass production of copper clad steel such as trolley wire. and need expensive manufacturing facilities. The present paper describes the improvement of the conventional continuous casting process to fabricate copper clad steel wire, which its core metal is low thermal expansion Fe-Ni alloy and its sheath material is copper. In particular, the formation of intermetallic compound at interface between core and sheath was investigated in order to introduce optimum continuous casting process parameter for fabrication of copper clad steel wire with higher electrical conductivity. The mechanical strength of copper clad steel wire was also investigated through wiredrawing process with of 95% in total reduction ratio.

• 조명전기설비학회논문지
• /
• 제15권3호
• /
• pp.57-66
• /
• 2001

본 논문에서는 전력계통의 안정도를 향상시키기 위하여 동기 발전기와 정지형 무효전력 보상기예 대한 퍼지-PI 제어기를 설계하기 위한 제어 기법을 설명하였다. 정지형 무효전력 보상기는 고정된 용량의 커패시터와 싸이리스터 제어에 의하여 용량이 가변되는 인덕터가 병렬로 연결된 구조를 가지고 있으며, 시스템 전압을 제어할 뿐만 아니라 동기 발전기의 제동을 개선하기 위해 설계되었다. 본 논문에서 제안한 SVC 계통의 퍼지-PI 제어기의 파라미터는 퍼지 추론 기법에 의해 자동 동조되어진다. 퍼지 추론 기법은 일반적인 기법과는 달리 인간의 경험과 전문가의 지식을 제어 규칙으로 제어 동작을 결정하였다. 그리하여 인간의 추론 과정과 매우 유사한 MMGM을 이용하여 PI 이득의 퍼지 추론 기법을 SVC 계통에 적용하여 설명하였다. 제안된 방법의 강인성을 입증하기 위해 중부하시, 정상부하시 및 경부하시에 초기 전력을 변동시킨 경우에 대하여 시스템의 회전자각, 각속도 편차 특성 및 단자전압의 동특성을 고찰하여 기존의 전력시스템안정화장치보다 응답특성이 우수함을 보였다.

• 한국정보통신학회논문지
• /
• 제13권7호
• /
• pp.1267-1271
• /
• 2009

본 논문에서는 LTCC 다층회로 기술을 이용하여 GSM과 CDMA 대역을 분리 하는 diplexer를 설계 및 제작하여 그 특성을 측정하였다. Diplexer의 집적도를 높이가 위해 3차원 적층형 인덕터와 커패시터를 이용하여 유전율 7이고, 총 6층의 LTCC 기판에 설계되었다. 저역통과 필터에 인덕터와 고역통과 필터에 커패시터를 각각 병렬로 결합하여 두 대역의 주파수 대역의 선택성을 높였다. LTCC표준 공정으로 제작되어진 다이플렉서의 크기는CPW pad를 포함하여 3,450 ${\times}$4,000 ${\times}$694 ${\mu}$m3이다. GSM 대역에서 -1.35 dB 이하의 삽입 손실과 -5.66 dB 이상의 반사 손실, 그리고 CDMA 대역에서는 -1.54 dB 이하의 삽입 손실과 -9.30 dB 이상의 반사 손실의 특성을 나타내었다.

• 한국산학기술학회논문지
• /
• 제16권2호
• /
• pp.1348-1354
• /
• 2015

논문에서는 공학적 응용을 위한 로렌츠 카오스 회로를 연산증폭기, 곱셈기 및 MOS 가변저항 등을 이용하여 전자회로로 구현하였다. PSPICE 모의실험을 통하여, MOS 저항의 전압 변화에 따라, 로렌츠 회로가 주기상태, 카오스 상태로 변하는 것을 시간파형, 주파수 특성 및 위상특성 등을 통하여 보였다. 제안하는 회로를, 하드웨어로 구현하여 MOS 저항의 전압변화에 따라 로렌츠 회로의 카오스 다이내믹스가 제어됨을 확인하였다.

• 한국전기전자재료학회논문지
• /
• 제20권7호
• /
• pp.575-580
• /
• 2007

A 16 Mb 1T1C FeRAM device was integrated with BLT capacitors. But a lot of cells were failed randomly during the measuring the bit-line signal distribution of each cell. The reason was revealed that the grain size and orientation of the BLT thin film were severely non-uniform. And the grain size and orientation were severely affected by the process conditions of post heat treatment, especially nucleation step. The optimized annealing temperature at the nucleation step was $560^{\circ}C$. The microstructure of the BLT thin film was also varied by the annealing time at the step. The longer process time showed the finer grain size. Therefore, the uniformity of the grain size and orientation could be improved by changing the process conditions of the nucleation step. The FeRAM device without random bit-fail cell was successfully fabricated with the optimized BLT capacitor and the sensing margin in bit-line signal distribution of it was about 340 mV.

• 한국전기전자재료학회논문지
• /
• 제22권6호
• /
• pp.470-475
• /
• 2009

We deposited $Al_2O_3$ thin films on GaN by remote plasma atomic layer deposition (RPALD) technique, trimethylaluminum(TMA) and oxygen were used as precursors, at fixed process condition, the number of cycle were changed. Growth rate per cycle was $1.2\;{\AA}$/cycle. and Growth rate was in proportion to a number of cycle, the GaN MIS capacitors that $Al_2O_3$ thin film were deposited above 12 nm, have excellent electrical properties, a low electrical leakage current density(${\sim}10^{-10}\;A/cm^2$ at 1.5 MV), but below 12 nm, we can see the degradation of the leakage current density. After post deposition annealing, Dielectric constant was estimated by 1 MHz high-frequency C-V method, it was varied with the anealing temperature from 6.9 at no post anealed to 7.6 at $800^{\circ}C$, and we can see a improvement of the leakage current density and breakdown voltage by post deposition anealing below $700^{\circ}C$, but, after anealed at $800^{\circ}C$, we can see the degradation of the leakage current density and breakdown voltage.

• 한국재료학회지
• /
• 제9권6호
• /
• pp.551-555
• /
• 1999

The deposition condition to obtain stoichiometric $Ta_2$O\ulcorner films, which is still controversial, using magnetron reactive sputtering was studied. The films were deposited by varying $O_2$gas flow rate with sputtering power and Ar gas flow rate of 200W and 60 sccm fixed. At the conditions of $O_2$ gas flow rate over 20 sccm, amorphous Tantalum oxide films with the refractive index of 2.1 and dielectric constant of 25 were deposited. Among those films, the capacitors dielectric properties of the film deposited at the condition of $O_2$ gas flow rate 50 sccm was best, the leakage current was 1$\times$10\ulcornerA/$\textrm{cm}^2$ at the electric field strength of 0.5 MC/cm and the breakdown field strength was over 2.0 MV/cm. This result could be explained from the analysis comparing with a standard sample using RBS because the composition of the film deposited at this condition was closest to the stoichiometric $Ta_2$O\ulcorner. The result of XPS analysis convinced that this film was stoichiometric $Ta_2$O\ulcorner film. A maximum cathode voltage was observed when $O_2$gas flow rate was 30 sccm. This shows that the Schiller's proposition that one can obtain stoichiometric films at the condition of maximum cathode voltage is not correct and more oxygen than that of the maximum voltage condition is necessary to deposit the stoichiometric Ta$_2$O\ulcorner films.

• 한국항행학회논문지
• /
• 제17권6호
• /
• pp.720-725
• /
• 2013

본 논문은 핑거 (finger) 형 전극에 의해 증강된 가장자리 전계가 가변 캐패시터의 가변성을 개선시킬 수 있음을 보여주고 있다. 가장자리가 긴 전극을 설계하기 위해 면적과 선폭이 다른 finger 형태의 전극들이 설계되었다. 가변 바렉터들은 quartz 기판위에 para/ferro/para의 가변 다층 유전체 박막을 이용하여 제작되었다. 기존의 일반적인 가변 캐패시터와 비교해서, 핑거형 캐패시터들의 유효 용량와 가변성 특성을 분석하였다. 1~2.5 GHz에서 증강된 가장자리 전계로 인해 긴 가장자리 전극으로 설계된 가변 캐패시터의 유효 용량과 가변성이 각각 24~40 % 그리고 7~12 % 증가하였다.

• Journal of Power Electronics
• /
• 제17권4호
• /
• pp.849-859
• /
• 2017

This paper illustrates the analysis and design of a multi-resonant converter applied to an electric vehicle (EV) charger. Thanks to the notch resonant characteristic, the multi-resonant converter achieve soft switching and operate with a narrowed switching frequency range even with a wide output voltage range. These advantages make it suitable for battery charging applications. With two more resonant elements, the design of the chosen converter is more complex than the conventional LLC resonant converter. However, there is not a distinct design outline for the multi-resonant converters in existing articles. According to the analysis in this paper, the normalized notch frequency $f_{r2n}$ and the second series resonant frequency $f_{r3n}$ are more sensitive to the notch capacitor ratio q than the notch inductor ratio k. Then resonant capacitors should be well-designed before the other resonant elements. The peak gain of the converter depends mainly on the magnetizing inductor ratio $L_n$ and the normalized load Q. And it requires a smaller $L_n$ and Q to provide a sufficient voltage gain $M_{max}$ at ($V_{o\_max}$, $P_{o\_max}$). However, the primary current increases with $(L_nQ)^{-1}$, and results in a low efficiency. Then a detailed design procedure for the multi-resonant converter has been provided. A 3.3kW prototype with an output voltage range of 50V to 500V dc and a peak efficiency of 97.3 % is built to verify the design and effectiveness of the converter.