• 제목/요약/키워드: X channel

검색결과 523건 처리시간 0.025초

AO/DI 인터넷 서비스의 D채널 패킷 액세스 회선 용량 분석 (D-channel Packet Access Line Capacity Analysis of the AO/DI Internet Service)

  • 이강원;국광호;정광재;김태일
    • 산업공학
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    • 제13권4호
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    • pp.709-716
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    • 2000
  • In this paper, We analyze a capacity dimensioning and performance of the access line to the X.25 packet network when the AO/DI internet service is connected via D-channel. We show the forecasting methodology of the traffic demand of the D-channel internet services when the TDX-1OA switching system accommodates the target number of subscriber. Based on the traffic demand forecast, the required capacity of the access line is suggested to prevent bottleneck problem in the access line to the X.25 packet network.

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The Effect of Quantitative Easing on Inflation in Korea

  • Nam, Min-Ho
    • East Asian Economic Review
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    • 제22권4호
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    • pp.507-529
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    • 2018
  • This paper evaluates the whole impact of quantitative easing on inflation in Korea implemented by the central banks in four major advanced economies, the U.S., Euro Area, U.K. and Japan. According to the analysis employing a VAR-X model with the security holdings of those central banks an exogenous variable, quantitative easing is estimated to exert downward pressures on inflation in Korea. Considering the impulse responses of Korean macroeconomic variables to a quantitative easing shock, the spillover effect is transmitted through exchange rate channel while trade channel turns out to be ineffective. In an additional analysis assessing the impact of each quantitative easing program of the central banks, only those of the Fed and European Central Bank are estimated to be significant. The empirical results prove to be robust even if using long-term interest rates as an alternative indicator of quantitative easing.

The Trap Characteristics of SILC in Silicon Oxide for SoC

  • Kang C. S.
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2004년도 ICEIC The International Conference on Electronics Informations and Communications
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    • pp.209-212
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    • 2004
  • In this paper, The stress induced leakage currents of thin silicon oxides is investigated in the nano scale structure implementation for Soc. The stress and transient currents associated with the on and off time of applied voltage were used to measure the distribution of high voltage stress induced traps in thin silicon oxide films. The stress and transient currents were due to the charging and discharging of traps generated by high stress voltage in the silicon oxides. The channel current for the thickness dependence of stress current, transient current, and stress induced leakage currents has been measured in oxides with thicknesses between $41\square\;and\;113.4\square,$ which have the channel width x length 10x1um, respectively. The stress induced leakage currents will affect data retention and the stress current, transient current is used to estimate to fundamental limitations on oxide thicknesses. The weight value of synapse transistor was caused by the bias conditions. Excitatory state and inhitory state according to weighted values affected the channel current. The stress induced leakage currents affected excitatory state and inhitory state.

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Optimization of Double Gate Vertical Channel Tunneling Field Effect Transistor (DVTFET) with Dielectric Sidewall

  • WANG, XIANGYU;Cho, Wonhee;Baac, Hyoung Won;Seo, Dongsun;Cho, Il Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제17권2호
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    • pp.192-198
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    • 2017
  • In this paper, we propose a novel double gate vertical channel tunneling field effect transistor (DVTFET) with a dielectric sidewall and optimization characteristics. The dielectric sidewall is applied to the gate region to reduced ambipolar voltage ($V_{amb}$) and double gate structure is applied to improve on-current ($I_{ON}$) and subthreshold swing (SS). We discussed the fin width ($W_S$), body doping concentration, sidewall width ($W_{side}$), drain and gate underlap distance ($X_d$), source doping distance ($X_S$) and pocket doping length ($X_P$) of DVTFET. Each of device performance is investigated with various device parameter variations. To maximize device performance, we apply the optimum values obtained in the above discussion of a optimization simulation. The optimum results are steep SS of 32.6 mV/dec, high $I_{ON}$ of $1.2{\times}10^{-3}A/{\mu}m$ and low $V_{amb}$ of -2.0 V.

Evaluation of seismic criteria of built-up special concentrically braced frames

  • Izadi, Amin;Aghakouchak, Ali A.
    • Steel and Composite Structures
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    • 제29권1호
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    • pp.23-37
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    • 2018
  • In this paper, seismic provisions related to built-up special concentrically braced frames (BSCBFs) are investigated under cyclic loading using non-linear finite element analysis of a single-bay single-story frame. These braces, which contain double angle and double channel brace sections, are considered in two types of single diagonal and X-braced frames. The results of this study show that current seismic provisions such as observing the 0.4 ratio for slenderness ratio of individual elements between stitch connectors are conservative in BSCBFs, and can be increased according to the type of braces. Furthermore, such increments will lead to decreasing or remaining the current middle protected zone requirements of each BSCBFs. Failure results of BSCBFs, which are related to the plastic equivalent strain growth of members and ductility capacity of the models, show that the behaviors of double channel back-to-back diagonal braces are more desirable than those of similar face-to-face ones. Also, for double angle diagonal braces, results show that the failure of back-to-back BSCBFs occurs faster in comparison with face-to-face similar braces. In X-braced frames, cyclic and failure behaviors of built-up face-to-face models are more desirable than similar back-to-back braces in general.

Organic Thin Film Transistors for Liquid Crystal Display Fabricated with Poly 3-Hexylthiophene Active Channel Layer and NiOx Electrodes

  • Oh, Yong-Cheul
    • 한국전기전자재료학회논문지
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    • 제19권12호
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    • pp.1140-1143
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    • 2006
  • We report on the fabrication of P3HT-based thin-film transistors (TFTs) for liquid crystal display that consist of $NiO_x$, poly-vinyl phenol (PVP), and Ni for the source-drain (S/D) electrodes, gate dielectric layer, and gate electrode, respectively The $NiO_x$ S/D electrodes of which the work function is well matched to that of P3HT are deposited on a P3HT channel by electron-beam evaporation of NiO powder. The maximum saturation current of our P3HT-based TFT is about $15{\mu}A$ at a gate bias of -30 V showing a high field effect mobility of $0.079cm^2/Vs$ in the dark, and the on/off current ratio of our TFT is about $10^5$. It is concluded that jointly adopting $NiO_x$ for the S/D electrodes and PVP for gate dielectric realizes a high-quality P3HT-based TFT.

Immuno Gold 표지법을 이용한 대장균내 Vibrio fluvialis MotX 단백질의 존재 부위 결정 (Detection of the Recombinant MotX Protein Vibrio fluvialis in Escherichia coli with Immuno-Gold Labeling Method)

  • 이종희;박제현;김선회;안선희;공인수
    • 한국수산과학회지
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    • 제35권4호
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    • pp.451-453
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    • 2002
  • The rotation of the flagellar motor is powered by the electrochemical gradient of specific ions across the cytoplasmic membrane. Recently, the gents of the Na'-driven motor have been cloned from marine bacterium of Vibrio sp. and some of the motor proteins have been purified and characterized. Also, motx gene encoding a channel component of the sodium type flagellar motor was identified from Vibrio Huuiaiis (KTCC 2473). The amino acid sequence of MotX protein from V, Huvialis shared 90, 85, $85\%$ identity with V, cholerae, V. alginolyticus, V parahaemolyticus, respectively. We have studied the localization of the expressed MotX protein in Escherichia coli by immune-gold labeling of ultra-thin frozen section. Our observation of the expressed protein indicated that MotX protein could be existed as attachment to inner membrane in E. coli.

저궤도 관측위성에 탑재된 X-밴드 송신기의 Quality Loss (The Quality Loss of a X-Band Transmitter on the LEO Satellite)

  • 동문호
    • 한국통신학회논문지
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    • 제25권9A호
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    • pp.1306-1312
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    • 2000
  • 저궤도 관측위성에 탑재된 전자광학 카메라(Electro Optical Instrument)에서 생성되는 지상 표적의 영상데이터 (수 백 Mbps)를 실시간 지상 수신소로 전송하는 X-밴드 송신기에 대한 quality loss를 MC 방식의 시뮬레이션으로 산출하였다. 본 quality loss 시뮬레이션에는 QPSK 변조기의 데이터 비대칭(data asymmetry), I Q 채널간의 신호 크기 및 위상편차 불균형(unbalance), 채널결합기(OMUX)의 채널필터에 의한 변조파형 정형화 및 채널간섭 등의 변수가 포함되었다. 무선 구간의 잡음채널을 가산성 가우시안 백색잡음으로 가정할 때, 신뢰도 95 %를 기준한 시뮬레이션에서 X-밴드 송신기의 quality loss 0.7 dB를 구했으며, 이 quality loss는 데이터 링크의 링크버짓(link budget)에서 부가적인 손실항으로 반영되었다.

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압력지연삼투(PRO) 발전 시스템에서 채널 입구 압력차의 영향에 대한 수치해석적 연구 (Numerical Studies on the Effects of the Channel-Inlet-Pressure Difference in the Pressure-Retarded Osmosis (PRO) Power System)

  • 홍성수;류원선;전명석;정귀영
    • Korean Chemical Engineering Research
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    • 제52권1호
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    • pp.68-74
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    • 2014
  • 해수-담수 염도 차 발전을 위한 압력지연삼투(pressure-retarded osmosis: PRO) 시스템의 나권형(spiral wound) 모듈에서 공급채널과 유도채널 사이의 입구 압력차의 영향이 수치적으로 연구되었다. 그리하여 막을 통한 물과 용질-플럭스들의 변화와 전력이 예측되었다. 막을 통한 물-플럭스의 크기는 두 채널 간 입구 압력차가 증가할수록 x축 방향으로 감소하고 y축 방향으로 증가하였다. 반면에 막을 통한 용질-플럭스의 크기는 반대의 경향을 보였다. 공급채널 내 유체의 농도는 y축 방향으로 크게 증가하였고, 유도채널 내 농도는 x축 방향으로 크게 감소하였다. 본 시스템에서 입구 압력차가 1~11 atm일 때 공급채널 내 유량은 8~13% 가량 감소하였고, 유도채널 내 유량은 그만큼 증가하였다. 전력밀도는 입구 압력 차가 증가할수록 증가하다가 감소하였다.

가동보 운영 및 하상경사 변화에 의한 보 상류 퇴사과정의 실험적 분석 (Experimental analysis of the sedimentation processes in the movable weir by changing the channel slope considering weir operation)

  • 이경수;장창래
    • 한국수자원학회논문집
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    • 제51권8호
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    • pp.729-737
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    • 2018
  • 본 연구에서는 실내실험을 통하여 개량형 공압식 가동보를 대상으로 수로경사 변화를 고려한 유사의 수리학적 발달 과정을 분석하였다. 분석결과 보에 의하여 형성된 델타는 시간이 증가함에 따라 하류로 이동하며, 델타높이($h_d$)는 증가하였다. 또한 보에 도달 할수록 흐름이 약해지면서 델타의 이동속도($S_D$)는 감소하였다. 무차원 델타 위치($x_D/x$)가 증가할수록 무차원 델타의 유효높이($h_d/h_w$)와 무차원 저수지 용량($V_{xD}/V_x$)이 증가였다. 따라서 동일한 조건에서 수로경사(i)가 완만할수록 델타의 퇴적량($Q_s$)이 감소하게 되며, 델타의 체적($V_{xD}$) 발달에 큰 영향을 미치는 것으로 나타났다. 통수 초기 델타의 전면경사가 완만하며, 델타가 하류로 이동할수록 델타의 전면경사는 증가하였다. 또한 수로경사(i)가 완만할수록 델타의 전면부 길이 비($h_d/{\Delta}S$)는 1에 가까워지고, 무차원 델타의 높이($h_d/h$)와 무차원 델타의 이동속도($S_D/V_0$)가 감소하였다. 델타의 높이($h_d$)가 증가할수록 수심(h)은 감소하였으며, 보에 접근하는 유속($V_0$)과 델타의 이동속도($S_D$)도 감소하였다.