• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.752-755
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• 1997

In this paper, a scheduling algorithm is proposed for a programmable logic controller(PLC) with remote I/Os, assuming the multi-tasking facilities. Since sequence programs are executed on the application processor and I/O data are transmitted by the network processor concurrently, the proposed algorithm schedules the data transmission as well as the sequence program execution. The suggested algorithm guarantees the bounded WCRT(worst case response time), which is the one third of the WCRT in the absence of scheduling. Computer simulation shows that the algorithm can be easily applied to a real PLC without critical constraints on utilization of resources and inter-relation among tasks.

• International Journal of Internet, Broadcasting and Communication
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• v.13 no.1
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• pp.134-142
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• 2021

This paper proposes a probabilistic method in analyzing timing measurements to determine the periodicity of real-time tasks. The proposed method fills a gap in existing techniques, which either concentrate on the estimation of worst-case execution times, or do not consider the stochastic behavior of the real-time scheduler. Our method is based on the Z-test statistical analysis which calculates the probability of the measured period to fall within a user-defined standard deviation limit. The distribution of the measured period should satisfy two conditions: its center (statistical mean) should be equal to the scheduled period of the real-time task, and that it should be symmetrical with most of the samples focused on the center. To ensure that these requirements are met, a data adjustment process, which omits any outliers in the expense of accuracy, is presented. Then, the Z-score of the distribution according to the user-defined deviation limit provides a probability which determines the periodicity of the real-time task. Experiments are conducted to analyze the timing measurements of real-time tasks based on real-time Linux extensions of Xenomai and RT-Preempt. The results indicate that the proposed method is able to provide easier interpretation of the periodicity of real-time tasks which are valuable especially in comparing the performance of various real-time systems.

• Journal of Korea Multimedia Society
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• v.13 no.10
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• pp.1423-1435
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• 2010

Building wireless sensor networks requires a constituting sensor node to consider the following limited hardware resources: a small battery lifetime limiting available power supply for the sensor node, a low-power microprocessor with a low-performance computing capability, and scarce memory resources. Despite such limited hardware resources of the sensor node, the sensor node platform needs to activate real-time sensing, guarantee the real-time processing of sensing data, and exchange data between individual sensor nodes concurrently. Therefore, in this paper, we propose an energy-efficient real-time task scheduling technique for battery-powered wireless sensor nodes. The proposed energy-efficient task scheduling technique controls the microprocessor's operating frequency and reduces the power consumption of a task by exploiting the slack time of the task when the actual execution time of the task can be less than its worst case execution time. The outcomes from experiments showed that the proposed scheduling technique yielded efficient performance in terms of guaranteeing the completion of real-time tasks within their deadlines and aiming to provide low power consumption.

• The KIPS Transactions:PartA
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• v.9A no.1
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• pp.9-18
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• 2002

In this paper, we propose scalable scheduling techniques based on EDF to efficiently integrate hard real-time and multimedia soft real-time tasks in the distributed real-time multimedia database system. Hard tasks are guarangteed based on worst case execution times, whereas multimedia soft tasks are served based on mean execution times. This paper describes a served-based scheme for partitioning the CPU bandwidth among different task classes that coexist in the same system. To handle the problem of class overloads characterized by varying number of tasks and varying task arrival rates, thus scheme shows how to adjust the fraction of the CPU bandwidth assigned to each class. This scheme fixes the maximum time that each hard task can execute in the period of the server, whereas it can dynamically change the bandwidth reserved to each multimedia task. The proposed method is capable of minimizing the mean tardiness of multimedia tasks, without jeopardizing the schedulability of the hard tasks. The performance of this scheduling method is compared with that of similar mechanisms through simulation experiments.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.46 no.3
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• pp.77-85
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• 2009

Execution times of tasks can be variable depend on input data. If we choose a high performance processor to satisfy the worst case execution times, the hard cost becomes high and the energy consumption also becomes large. To apply a lower performance processor, we have to utilize processor capacity maximally while overrunning tasks can not affect deadlines of other tasks. To be used for such systems, this paper presents SBP (Shared Bandwidth Partitioning) that a processor bandwidth is reserved and shared among all tasks. If a task needs more processor capacity, it can use a portion of the shared bandwidth. A simulation result shows that SBP provides better performance than previous algorithms. SBP reduces deadline miss ratio which is related to scheduling quality. And the number of context switches, which is related to system overhead, is also reduced.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.10
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• pp.141-151
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• 1994

this paper describes the design and implementation of a RISC processor for embedded control systems. This RISC processor integrates a register file, a pipelined execution unit, a FPU interface, a memory interface, and an instruction prefetcher. Its characteristics include both single cycle executions of most instructions in a 2 phase 20 MHz frequency and the worst case interrupt latency of 7 cycles with the vectored interrupt handling that makes it possible to be applicable to the real time processing system. For efficient handling of multi-cycle instructions, data stationary hardwired control scheme equippedwith cycle counter was used. This chip integrates about 139K transistors and occupies 9.1mm$\times$9.1mm in a 1.0um DLM CMOS technology. The power dissipation is 0.8 Watts from a 5V supply at 20 MHz operation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.10B
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• pp.1648-1664
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• 2000

This paper proposes a real-time dynamic storage allocation algorithm QSHF(quick-segregated-half-fit) that provides various memory allocation policies. that manages a free block list per each word size for memory requests of small size good(segregated)-fit policy that manages a free list per proper range size for medium size requests and half-fit policy that manages a free list per proper range size for medium size requests and half-fit policy that manages a free list per each power of 2 size for large size requests. The proposed algorithm has the time complexit O(1) and makes us able to easily estimate the worst case execution time(WCET). This paper also suggests two algorithm that finds the proper free list for the requested memory size in predictable time and if the found list is empty then finds next available non-empty free list in fixed time. In order to confirm efficiency of the proposed algorithm we simulated the memory utilization of each memory allocation policy. The simulation result showed that each policy guarantees the constant WCET regardless of memory size but they have trade-off between memory utilization and list management overhead.

• Journal of KIISE:Computer Systems and Theory
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• v.37 no.6
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• pp.330-338
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• 2010

Flash storage devices are very popularly used in portable devices such as cell phones, PDAs and MP3 players. As technology is improved, users want much bigger and faster storage system. Paradoxically, people have to wait more and more time proportionally to the capacity of their storage devices when these are trying to be recovered after file system crash. It is serious problem because booting time of devices is dominated by crash recovery of flash file system. In this paper, we design a crash recovery mechanism, named 'Working Area(WA hereafter)' technique, which has bounded crash recovery execution time. With WA technique, write operations to flash memory are only performed in WA. Therefore, by simply scanning the latest WA. We can recover a file system crash because every change for flash memory is occured only in latest WA. We implement the WA technique based on YAFFS2 and evaluate by comparing with traditional techniques. As a result, WA technique shows that its crash recovery execution time is 25 times faster than Log-based Method when we use 1 gig a bytes NAND flash memory in worst case. This gap will be futher and futher as storage capacity grows.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.12 no.4
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• pp.1693-1713
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• 2018

An important technique used by database administrators (DBAs) is to improve performance in decision-support workloads associated with a Star schema is multi-level partitioning. Queries will then benefit from performance improvements via partition elimination, due to constraints on queries expressed on the dimension tables. As the task of multi-level partitioning can be overwhelming for a DBA we are proposing a wizard that facilitates the task by calculating a partitioning scheme for a particular workload. The system resides completely on a client and interacts with the costing estimation subsystem of the query optimizer via an API over the network, thereby eliminating any need to make changes to the optimizer. In addition, since only cost estimates are needed the wizard overhead is very low. By using a greedy algorithm for search space enumeration over the query predicates in the workload the wizard is efficient with worst-case polynomial complexity. The technology proposed can be applied to any clustering or partitioning scheme in any database management system that provides an interface to the query optimizer. Applied to the Teradata database the technology provides recommendations that outperform a human expert's solution as measured by the total execution time of the workload. We also demonstrate the scalability of our approach when the fact table (and workload) size increases.

• The KIPS Transactions:PartA
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• v.8A no.3
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• pp.253-260
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• 2001

It is important to detect races for debugging shared-memoy parallel programs, because the races cause unintended nondeterministic program execution. Previous on-the-fly techniques to detect races can not guarantee the first race detection in nested parallel programs. Detecting the first race is important for debugging parallel programs, since the removal of the first race may make the next occurred races disappear. In this paper, we presents an on-the-fly detection technique to detect all of the first races through the reexecution of the debugged programs. We assume that the debugged parallel program may have one-way nested parallel programs. The number of reexecution is at the least the nesting depth of the program in the worst case. The space complexity is O(VT) and the time complexity to detect race in each access of access history is O(T), where V is number of shared variables and T is the maximum parallelism of the program. This efficiency of our technique in each execution is the same with the previous on-the-fly detection techniques. Therefore, this technique makes debugging parallel programs more effective and practical.