• Progress in Medical Physics
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• v.19 no.1
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• pp.42-48
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• 2008

Bio-implantable devices such as heart pacers, gastric pacers and drug-delivery systems require power for carrying out their intended functions. These devices are usually powered through a battery implanted with the system or are wired to an external power source. This paper describes an inductive power transmission link, which was developed for an implantable stimulator for direct stimulation of denervated muscles. The carrier frequency is around 1MHz, the transmitter coil has a diameter of 46mm, and the implant coil is 46mm. Data transmission to the implant with amplitude shift keying (ASK) and back to the transmitter with passive telemetry can be added without major design changes. We chose the range of coil spacing (2 to 30mm) to care for lateral misalignment, as it occurs in practical use. If the transmitter coil has a well defined and reliable position in respect to the implant, a smaller working range might be sufficient. Under these conditions the link can be operated in fixed frequency mode, and reaches even higher efficiencies of up to 37%. The link transmits a current of 50 mA over a distance range of 2-15 mm with an efficiency of more than 20% in tracking frequency. The efficiency of the link was optimized with different approaches. A class E transmitter was used to minimize losses of the power stage. The geometry and material of the transmitter coil was optimized for maximum coupling. Phase lock techniques were used to achieve frequency tracking, keeping the transmitter optimally tuned at different coupling conditions caused by coil distance variations.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.05a
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• pp.465-469
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• 2000

This paper describes a single-chip full-custom implementation of pipelined adaptive decision-feedback equalizer (PADFE) using a 0.25-${\mu}{\textrm}{m}$ CMOS technology for wide-band wireless digital communication systems. To enhance the throughput rate of ADFE, two pipeline stage are inserted into the critical path of the ADFE by using delayed least-mean-square (DLMS) algorithm Redundant binary (RB) arithmetic is applied to all the data processing of the PADFE including filter taps and coefficient update blocks. When compared with conventional methods based on two's complement arithmetic, the proposed approach reduces arithmetic complexity, as well as results in a very simple complex-valued filter structure, thus suitable for VLSI implementation. The design parameters including pipeline stage, filter tap, coefficient and internal bit-width and equalization performance such as bit error rate (BER) and convergence speed are analyzed by algorithm-level simulation using COSSAP. The singl-chip PADFE contains about 205,000 transistors on an area of about 1.96$\times$1.35-$\textrm{mm}^2$. Simulation results show that it can safely operate with 200-MHz clock frequency at 2.5-V supply, and its estimated power dissipation is about 890-mW.

• The KIPS Transactions:PartC
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• v.9C no.3
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• pp.385-398
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• 2002

To accommodate the increasing number of mobile terminals in the limited radio spectrum, wireless systems have been designed as micro/picocellular architectures for a higher capacity. This reduced coverage area of a cell has caused a higher rate of hand-off events, and the hand-off technology for efficient process becomes a necessity to provide a stable service. Population-based Bandwidth Reservation(PBR) Scheme is proposed to provide prioritized handling for hand-off calls by dynamically adjusting the amount of reserved bandwidth of a cell according to the amount of cellular traffic in its neighboring cells. We analyze the performance of the PBR scheme according to the changes of a fractional parameter, f, which is the ratio of request reservation to the total amount of bandwidth units required for hand-off calls that will occur for the next period. The vague of this parameter, f should be determined based on QoS(Quality of Service) requirement. To meet the requirement the value of Parameter(f) must be able to be adjusted dynamically according to the changing traffic conditions. The best value of f can be determined by a function of the average speed of mobile stations, average call duration, cell size, and so on. This paper considers the average call duration and the cell size according to the speed of mobile stations. Although some difference exists as per speed, in the range of 0.4 $\leq$ f $\leq$ 0.6, Blocking Probability, Dropping Probability and Utilization show the best values.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.10A
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• pp.965-970
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• 2005

In this paper, SPDT Tx/Rx MMIC switch applicable to IEEE 802.11a WLAN systems is designed and fabricated using a specific designed epitaxial layered pHEMT wafer and ETRI's $0.5{\mu}m$ pHEMT switch process. The SPDT switch exhibits a low insertion loss of 0.68dB, high isolation of 35.64dB, return loss of 13.4dB, power transfer capability of 25dBm, and 3rd order intercept point of 42dBm at frequency of 5.8GHz and control voltage of 0/-3V. The comparison of the measured performances with commercial products based on the GaAs pHEMT technology for low voltage operating at ${\pm}$ 3V/0V shows that the return loss is somewhat inferior to the commercial products and insertion loss is compatible with each other however, isolation characteristics are much better than in conventional chips. Based on these performances, we can conclude that the developed SPDT switch MMIC has an enough potential for IEEE802.11a standard 5 GHz-band wireless LAN applications.

• Culinary science and hospitality research
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• v.20 no.6
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• pp.254-261
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• 2014

In order to optimize process conditions for manufacturing retorted Kimchi soup by using stationary and rotary types systems were applied for sterilization process. For investigating the differences in heat penetration characteristics during sterilization, Kimchi soup was packed into retort pouches, and sterility ($F_0$ value) at various positions in the product was measured through a wireless $F_0$ sensor. Heat penetration characteristics were significantly affected by sterilization method. From data analysis, optimum ranges of sterilization temperature and time was determined to be $120.7^{\circ}C$, 13 min for rotary type and $120.7^{\circ}C$, 20 min for stationary type. At those conditions, they had similar sterility ($F_0$ value). The results showed that rotation provides faster heat penetration and more uniform sterility than various positions of the product. These results derived a lot of advantages from related industry. For instance, many of the more viscous semi-liquid products and heat sensitive natural products could be sterilized in the lager pouch sizes without overcooking or scorching. Hence, current study suggests that rotary type retort would make it possible not only to reduce processing times as 35~45%, but also to improve the quality of product as overall taste, flavor, color, and texture with significant difference (p<0.05).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.7
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• pp.97-103
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• 2004

In this paper, we propose a high speed block turbo code decoding algorithm and an efficient hardware architecture. The multimedia wireless data communication systems need channel codes which have the high-performance error correcting capabilities. Block turbo codes support variable code rates and packet sizes, and show a high performance due to a soft decision iteration decoding of turbo codes. However, block turbo codes have a long decoding time because of the iteration decoding and a complicated extrinsic information operation. The proposed algorithm using the threshold that represents a channel information reduces the long decoding time. After the threshold is decided by a simulation result, the proposed algorithm eliminates the calculation for the bits which have a good channel information and assigns a high reliability value to the bits. The threshold is decided by the absolute mean and the standard deviation of a LLR(Log Likelihood Ratio) in consideration that the LLR distribution is a gaussian one. Also, the proposed algorithm assigns '1', the highest reliable value, to those bits. The hardware design result using verilog HDL reduces a decoding time about 30% in comparison with conventional algorithm, and includes about 20K logic gate and 32Kbit memory sizes.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.5
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• pp.445-453
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• 2016

This paper presents the implementation and design of the 1T-1R wireless HD video streaming systems over 28 GHz mmWave frequency using 3GPP LTE-TDD standard on NI USRP RIO SDR platform. The baseband of the system uses USRP RIO that are stored in Xilinx Kintex-7 chip to implement LTE-TDD transceiver modem, the signal that are transceived from USRP RIO up or down converts to 28 GHz by using self-designed 28 GHz RF transceiver modules and it is finally communicated HD video data through self-designed $4{\times}8$ sub array antennas. It is that communication method between USRP RIO and Host PC use PCI express ${\times}4$ to minimize delay of data to transmit and receive. The implemented system show high error vector magnitude performance above 25.85 dBc and to transceive HD video in experiment environment anywhere.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1101-1110
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• 2011

This paper presents a printed, wideband folded monopole antenna for laptop and tablet computer applications. The proposed antenna is designed to cover bandwidth(2.3~10.6 GHz) of Bluetooth, WiMAX, and UWB system by using the printed folded monopole antenna having asymmetrical line width coupling with a parasitic inverted- L element. Also, wireless LAN band(5.15~5.85 GHz) which interferes with UWB system is rejected by inserting half-wavelength open stub in the folded monopole antenna. -10 dB bandwidth of the fabricated wideband antenna is 2.27~10.6 GHz (4.7:1) and -10 dB band-rejected bandwidth is measured as 700 MHz(5.15~5.85 GHz, 12.72 %). The gain and efficiency of the antenna except for the rejected band are higher than 3.93 dBi and 91.89 % and are measured as -2 dBi and 14.65 % at 5.5 GHz which is band-rejected frequency. The size of the antenna is suitable to install for small space of tablet and laptop computers as 12.75(1 ${\lambda}$/10)${\times}$12(1 ${\lambda}$/11) $mm^2$(${\lambda}$ is free space wavelength at 2.3 GHz). Therefore, we verified that the designed antenna is appropriate for wideband antenna of tablet and laptop PC applications.

• Journal of Korea Spatial Information System Society
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• v.9 no.1
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• pp.45-57
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• 2007

Recently, the development of sensor devices has accelerated researches on advanced technologies like Wireless Sensor Networks. Moreover, spatial sensors using GPS lead to the era of the Ubiquitous Computing Environment which generally uses spatial information and non-spatial information together. In this new era, a real-time processing system for spatial sensor data is essential. In this reason, new data processing systems called DSMS(Data Stream Management System) are being developed by many researchers. However, since most of them do not support geometry types and spatial functions to process spatial sensor data, they are not suitable for the Ubiquitous Computing Environment. For these reasons, in this paper, we designed and implemented a spatial DSMS by extending STREAM which stands for STanford stREam datA Manager, to solve these problems. We added geometry types and spatial functions to STREAM in order to process spatial sensor data efficiently. In addition, we implemented a Spatial Object Manager to manage shared spatial objects within the system. Especially, we implemented the Simple Features Specification for SQL of OGC for interoperability and applied algorithms in GEOS to our system.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.10
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• pp.39-50
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• 1998

Wide-band sharp-transition filters are widely used in applications such as wireless CODEC design or medical systems. Since these filters suffer from large sensitivity and roundoff noise, large word-length is required for the VLSI implementation, which increases the hardware size and the power consumption of the chip. In this paper, a low-power implementation technique for digital filters with wide-band sharp-transition characteristics is proposed using CPL (Complementary Pass-Transistor Logic), LWDF (Lattice Wave Digital Filter) and a modified DIFIR (Decomposed & Interpolated FIR) algorithm. To reduce the short-circuit current component in CPL circuits due to threshold voltage reduction through the pass transistor, three different approaches can be used: cross-coupled PMOS latch, PMOS body biasing and weak PMOS latch. Of the three, the cross-coupled PMOS latch approach is the most realistic solution when the noise margin as well as the energy-delay product is considered. To optimize CPL transistor size with insight, the empirical formulas for the delay and energy consumption in the basic structure of CPL circuits were derived from the simulation results. In addition, the filter coefficients are encoded using CSD (Canonic Signed Digit) format and optimized by a coefficient quantization program. The hardware cost is minimized further by a modified DIFIR algorithm. Simulation result shows that the proposed method can achieve about 38% reductions in power consumption compared with the conventional method.