• Title/Summary/Keyword: Window Layer

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Video Quality Assessment based on Deep Neural Network

  • Zhiming Shi
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.17 no.8
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    • pp.2053-2067
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    • 2023
  • This paper proposes two video quality assessment methods based on deep neural network. (i)The first method uses the IQF-CNN (convolution neural network based on image quality features) to build image quality assessment method. The LIVE image database is used to test this method, the experiment show that it is effective. Therefore, this method is extended to the video quality assessment. At first every image frame of video is predicted, next the relationship between different image frames are analyzed by the hysteresis function and different window function to improve the accuracy of video quality assessment. (ii)The second method proposes a video quality assessment method based on convolution neural network (CNN) and gated circular unit network (GRU). First, the spatial features of video frames are extracted using CNN network, next the temporal features of the video frame using GRU network. Finally the extracted temporal and spatial features are analyzed by full connection layer of CNN network to obtain the video quality assessment score. All the above proposed methods are verified on the video databases, and compared with other methods.

Reduction of Light Reflectance from InAlP by the Texture Formation Using Ultra-Thin Pt Layer (Pt 금속 박막을 이용한 InAlP층의 텍스쳐 구조 형성 및 반사율 측정)

  • Shin, Hyun Wook;Shin, Jae Cheol;Kim, Hyo Jin;Kim, Sung;Choe, Jeong-Woo
    • Journal of the Korean Vacuum Society
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    • v.22 no.3
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    • pp.150-155
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    • 2013
  • Textured surface has been fabricated to reduce the light reflectance from the solar cells. The textured surface is very suitable for the multi-junction III-V solar cells because it can decrease the light reflectance over a large wavelength range. In this study, we have generated a textured structure on InAlP which is used for the window layer of the multi-junction III-V solar cells. Ultra-thin Pt layer (0.7 nm) has been used for wet etching mask. An array of nanosized pyramid shape formed on InAlP surface dramatically reduces the light reflectance up to 13.7% over a large wavelength range (i.e., $0.3{\sim}1.5{\mu}m$).

WAP Abstract Kernel Layer Supporting Multi-platform (다중 플랫폼 지원을 위한 WAP 추상 커널 계층)

  • Gang, Yeong-Man;Han, Sun-Hui;Jo, Guk-Hyeon
    • The KIPS Transactions:PartD
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    • v.8D no.3
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    • pp.265-272
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    • 2001
  • In case of implementing a complicated application like WAP (Wireless Application Protocol) in a mobile terminal with the characteristics of bare machine and versatile kernel aspects of which are control, interrupt and IPC(Inter Process Communication), a special methodology should be needed. If not, it will cause more cost and human resources, even delayed product into launching for the time-to-market. This paper suggests AKL, (Abstract Kernel Layer) for the design and implementation of WAP on basis of multi-platform. AKL is running on the various kernel including REX, MS-DOS, MS-Window, UNIX and LINUX. For the purpose of it, AKL makes machine-dependant features be minimized and supports a consistent interface on API (Application Program Interface) point of view. Therefore, it makes poring times of a device be shorten and makes easy of maintenance. We validated our suggestion as a consequent of porting WAP into PlamV PDA and mobile phone with AKL.

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A Real-time Traffic Control Scheme for ATM network:RCT (ATM망을 위한 실시간 트래픽 제어 기법:RCT)

  • Lee, Jun-Yeon;Lee, Hae-Wan;Kwon, Hyeog-In
    • The Transactions of the Korea Information Processing Society
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    • v.4 no.11
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    • pp.2822-2831
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    • 1997
  • A B-ISDN network based on ATM must support several kinds of transport services with different traffic characteristics and service requirements. There is neither link-by-link flow control nor error control in the ATM layer. For different services, different flow/error controls could be performed at the AAL layer or at a higher Iayer(e.g. transport layer). In traditional data networks, the window now control mechanism combined with error control was used prevalently. But, the window flow control mechanism might be useless in ATM networks because the propagation delay is too large compared with the transmission rate. In this paper, we propose a simple flow control mechanism, called RCT(Rate Control for end-to-end Transport), for end-to-end data transport. The RCT shows acceptable performance when the average overload period is bounded by a certain time.

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Inductively coupled plasma etching of SnO2 as a new absorber material for EUVL binary mask

  • Lee, Su-Jin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.124-124
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    • 2010
  • Currently, extreme ultraviolet lithography (EUVL) is being investigated for next generation lithography. EUVL is one of competitive lithographic technologies for sub-22nm fabrication of nano-scale Si devices that can possibly replace the conventional photolithography used to make today's microcircuits. Among the core EUVL technologies, mask fabrication is of considerable importance due to the use of new reflective optics having a completely different configuration compared to those of conventional photolithography. Therefore, new materials and new mask fabrication process are required for high performance EUVL mask fabrication. This study investigated the etching properties of SnO2 (Tin Oxide) as a new absorber material for EUVL binary mask. The EUVL mask structure used for etching is SnO2 (absorber layer) / Ru (capping / etch stop layer) / Mo-Si multilayer (reflective layer) / Si (substrate). Since the Ru etch stop layer should not be etched, infinitely high selectivity of SnO2 layer to Ru ESL is required. To obtain infinitely high etch selectivity and very low LER (line edge roughness) values, etch parameters of gas flow ratio, top electrode power, dc self - bias voltage (Vdc), and etch time were varied in inductively coupled Cl2/Ar plasmas. For certain process window, infinitely high etch selectivity of SnO2 to Ru ESL could be obtained by optimizing the process parameters. Etch characteristics were measured by on scanning electron microscopy (SEM) and X-ray photoelectron spectroscopy (XPS) analyses. Detailed mechanisms for ultra-high etch selectivity will be discussed.

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Electrical Characteristics of Engineered Tunnel Barrier using $SiO_2/HfO_2$ and $Al_2O_3/HfO_2$ stacks ($SiO_2/HfO_2$$Al_2O_3/HfO_2$를 이용한 Engineered Tunnel Barrier의 전기적 특성)

  • Kim, Kwan-Su;Park, Goon-Ho;Yoon, Jong-Won;Jung, Jong-Wan;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.127-128
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    • 2008
  • The electrical characteristics of VARIOT (variable oxide thickness) with various $HfO_2$ thicknesses on thin $SiO_2$ or $Al_2O_3$ layer were investigated. Especially, the charge trapping characteristics of $HfO_2$ layer were intensively studied. The thin $HfO_2$ layer has small charge trapping characteristics while the thick $HfO_2$ layer has large memory window. Therefore, the $HfO_2$ layer is superior material and can be applied to charge storage as well as tunneling barrier of the non-volatile memory applications.

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Memory Characteristics of Al2O3/La2O3/SiO2 Multi-Layer Structures for Charge Trap Flash Devices (전하 포획 플래시 소자를 위한 Al2O3/La2O3/SiO2 다층 박막 구조의 메모리 특성)

  • Cha, Seung-Yong;Kim, Hyo-June;Choi, Doo-Jin
    • Korean Journal of Materials Research
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    • v.19 no.9
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    • pp.462-467
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    • 2009
  • The Charge Trap Flash (CTF) memory device is a replacement candidate for the NAND Flash device. In this study, Pt/$Al_2O_3/La_2O_3/SiO_2$/Si multilayer structures with lanthanum oxide charge trap layers were fabricated for nonvolatile memory device applications. Aluminum oxide films were used as blocking oxides for low power consumption in program/erase operations and reduced charge transports through blocking oxide layers. The thicknesses of $SiO_2$ were from 30 $\AA$ to 50 $\AA$. From the C-V measurement, the largest memory window of 1.3V was obtained in the 40 $\AA$ tunnel oxide specimen, and the 50 $\AA$ tunnel oxide specimen showed the smallest memory window. In the cycling test for reliability, the 30 $\AA$ tunnel oxide sample showed an abrupt memory window reduction due to a high electric field of 9$\sim$10MV/cm through the tunnel oxide while the other samples showed less than a 10% loss of memory window for $10^4$ cycles of program/erase operation. The I-V measurement data of the capacitor structures indicated leakage current values in the order of $10^{-4}A/cm^2$ at 1V. These values are small enough to be used in nonvolatile memory devices, and the sample with tunnel oxide formed at $850^{\circ}C$ showed superior memory characteristics compared to the sample with $750^{\circ}C$ tunnel oxide due to higher concentration of trap sites at the interface region originating from the rough interface.

An Evaluation of Multimedia Data Downstream with PDA in an Infrastructure Network

  • Hong, Youn-Sik;Hur, Hye-Sun
    • Journal of Information Processing Systems
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    • v.2 no.2
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    • pp.76-81
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    • 2006
  • A PDA is used mainly for downloading data from a stationary server such as a desktop PC in an infrastructure network based on wireless LAN. Thus, the overall performance depends heavily on the performance of such downloading with PDA. Unfortunately, for a PDA the time taken to receive data from a PC is longer than the time taken to send it by 53%. Thus, we measured and analyzed all possible factors that could cause the receiving time of a PDA to be delayed with a test bed system. There are crucial factors: the TCP window size, file access time of a PDA, and the inter-packet delay that affects the receiving time of a PDA. The window size of a PDA during the downstream is reduced dramatically to 686 bytes from 32,581 bytes. In addition, because flash memory is embedded into a PDA, writing data into the flash memory takes twice as long as reading the data from it. To alleviate these, we propose three distinct remedies: First, in order to keep the window size at a sender constant, both the size of a socket send buffer for a desktop PC and the size of a socket receive buffer for a PDA should be increased. Second, to shorten its internal file access time, the size of an application buffer implemented in an application should be doubled. Finally, the inter-packet delay of a PDA and a desktop PC at the application layer should be adjusted asymmetrically to lower the traffic bottleneck between these heterogeneous terminals.

Effects of $C_2F_{6}$ Gas on Via Etching Characteristics ($C_2F_{6}$ 가스가 Via Etching 특성에 미치는 영향)

  • Ryu, Ji-Hyeong;Park, Jae-Don;Yun, Gi-Wan
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.1
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    • pp.31-38
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    • 2002
  • In order to improve the 0.35 $mutextrm{m}$-via hole etching process the etching characteristic of the gas $C_2F_{6}$ has been analyzed. The samples were triple-layer films(TEOS/SOG/TEOS) on 8-inch wafers and the orthogonal array matrix technique was used for the process. The equipment for etching was the transformer coupled plasma (TCP) source which is a type of high density plasma(HDP). This experiment showed the etching rate for $C_2F_{6}$ was 0.8 $mutextrm{m}$/min-1.1 $mutextrm{m}$/min and the measured uniformity was under $pm$6.9% in the matrix window. The CD skew comparison between pre and post-etching was under 10% which is an outstanding results in the window of profile in anisotropic etching. There was no problem in C2F6 with the flow rate of 20sccm, but when 14sccm of $C_2F_{6}$ was supplied there was a recess problem on the inner wall of SOG film. Consequently the etching characteristic of $C_2F_{6}$ shows a fast etching rate and a very wide process window in HDP TCP.

Study on the Structural Stability and Charge Trapping Properties of High-k HfO2 and HFO2/Al2O3/HfO2 Stacks (High-k HfO2와 HfO2/Al2O3/HfO2 적층막의 구조 안정성 및 전하 트랩핑 특성 연구)

  • Ahn, Young-Soo;Huh, Min-Young;Kang, Hae-Yoon;Sohn, Hyunchul
    • Korean Journal of Metals and Materials
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    • v.48 no.3
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    • pp.256-261
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    • 2010
  • In this work, high-k dielectric stacks of $HfO_2$ and $HfO_2$/$Al_2O_3$/$HfO_2$ (HAH) were deposited on $SiO_2/Si$ substrates by atomic layer deposition as charge trapping layers in charge trapping devices. The structural stability and the charge trapping characteristics of such stacks were investigated using Metal-Alumina-Hafnia-Oxide-Silicon (MAHOS) structure. The surface roughness of $HfO_2$ was stable up to 11 nm with the insertion of 0.2 nm thick $Al_2O_3$. The effect of the thickness of the HAH stack and the thickness of intermediate $Al_2O_3$ on charge trapping characteristics were investigated for MAHOS structure under various gate bias pulse with duration of 100 ms. The threshold voltage shift after programming and erase showed that the memory window was increased with increasing bias on gate. However, the programming window was independent of the thickness of HAH charge trapping layers. When the thickness of $Al_2O_3$insertion increased from 0.2 nm to 1 nm, the erase window was decreased without change in the programming window.