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http://dx.doi.org/10.3365/KJMM.2010.48.03.256

Study on the Structural Stability and Charge Trapping Properties of High-k HfO2 and HFO2/Al2O3/HfO2 Stacks  

Ahn, Young-Soo (Research & Development Division, Hynix Semiconductor)
Huh, Min-Young (Department of Materials Science and Engineering, Yonsei University)
Kang, Hae-Yoon (Department of Materials Science and Engineering, Yonsei University)
Sohn, Hyunchul (Department of Materials Science and Engineering, Yonsei University)
Publication Information
Korean Journal of Metals and Materials / v.48, no.3, 2010 , pp. 256-261 More about this Journal
Abstract
In this work, high-k dielectric stacks of $HfO_2$ and $HfO_2$/$Al_2O_3$/$HfO_2$ (HAH) were deposited on $SiO_2/Si$ substrates by atomic layer deposition as charge trapping layers in charge trapping devices. The structural stability and the charge trapping characteristics of such stacks were investigated using Metal-Alumina-Hafnia-Oxide-Silicon (MAHOS) structure. The surface roughness of $HfO_2$ was stable up to 11 nm with the insertion of 0.2 nm thick $Al_2O_3$. The effect of the thickness of the HAH stack and the thickness of intermediate $Al_2O_3$ on charge trapping characteristics were investigated for MAHOS structure under various gate bias pulse with duration of 100 ms. The threshold voltage shift after programming and erase showed that the memory window was increased with increasing bias on gate. However, the programming window was independent of the thickness of HAH charge trapping layers. When the thickness of $Al_2O_3$insertion increased from 0.2 nm to 1 nm, the erase window was decreased without change in the programming window.
Keywords
semiconductors; deposition; electrical properties; TEM; flash memory;
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1 Y. M. Niquet, G. Allan, C. Delerue, and M. Lannoo, Appl. Phys. Lett. 77, 1182 (2000)   DOI   ScienceOn
2 M. Chang, M. Hasan, S. Jung, H. Park, M. Jo, H. Choi, M. Kwon, H. Hwang, and S. Choi, Microelectronic Engineering 84, 2002 (2007)   DOI   ScienceOn
3 J. R. Hwang, T. L. Lee, H. C. Ma, T. C. Lee, T. H. Chung, C. Y. Chang, S. D. Liu, B. C. Perng, J. W. Hsu, M. Y. Lee, C. Y. Ting, C. C. Huang, J. H. Shieh, and F. L. Yang, IEDM Tech. Dig. p.154, Washington D.C., USA (2005)
4 P. Y. Du and J. C. Guo, Int. Conf. Solid State Devices and Materials, p.986, Yokohama, Japan (2006)
5 Y. N. Tan, W. K. Chim, B. J. Cho, and W. K. Choi, IEEE Trans. Electron Devices 51, 1143 (2004)   DOI   ScienceOn
6 T. Ishida, Y. Okuyama, and R. Yamada, Proc. of IEEE Int. Reliab. Phy. Symp., p.516, California, USA (2006)
7 J. H. Kim and J. B. Choi, IEEE Trans. Electron Devices 51, 2048 (2004)   DOI   ScienceOn
8 S. Maikap, P. J. Tzeng, T. Y. Wang, C. H. Lin, H. Y. Lee, C. C. Wang, L. S. Lee, J. R. Yang, and M. J. Tsai, Symp. Nano Device Technology, p.16, Hsinchu, Taiwan (2006)
9 M. L. French and M. H. White, Solid State Electronics 37, 1913 (1994)   DOI   ScienceOn
10 J. Robertson, J. Vac. Sci. Technol. B18, 1785 (2000)
11 S. Maikap, P. J. Tzeng, T. Y. Wang, C. H. Lin, H. Y. Lee, L. S. Lee, J. R. Yang, and M. J. Tsai, Ext. Abstr. Solid State Devices and Materials 984 (2006)
12 X. Wang, J. Liu, W. Bai, and D. L. Kwong, IEEE Trans. Electron Devices 51, 597 (2004)   DOI   ScienceOn
13 B. Jiankang and M. H. White, Solid State Electronics 45, 113 (2001)   DOI   ScienceOn
14 C. H. Lee, S. H. Hur, Y. C. Shin, J. H. Choi, D. G. Park, and K. Kim, Appl. Phys. Lett. 86, 152908 (2005)   DOI   ScienceOn
15 M. She, H. Takeuci, and T. J. King, IEEE Non-volatile Semiconductor Memory Workshop, p.55, California, USA (2003)
16 H. Park, J. Lee, S. Kwon, S. Yoon, H. Lim, and D. Kim, J. Kor. Inst. Met. & Mater. 46, 835 (2008)
17 Y. N. Tan, W. K. Chim, W. K. Choi, M. S. Joo, and B. J. Cho, IEEE Trans. Electron Devices 53, 654 (2006)   DOI   ScienceOn
18 K. Kim, J. K. Choi, J. D. Choi, and H. S. Jeong, VLSI-TSATECH. 88 (2005)
19 S. Maikap, P. J. Tzeng, L. S. Lee, H. Y. Lee, C. C. Wang, P. H. Tsai, L. K. S. Chang-Liao, W. J. Chen, K. C. Liu, P. R. Jeng, and M. J. Tsai, Proc. Int. Symp. VLSI-TSA, p.36, Hsinchu, Taiwan (2006)