• Title/Summary/Keyword: Wideband Resistive Feedback LNA

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Wideband Resistive LNA based on Noise-Cancellation Technique Achieving Minimum NF of 1.6 dB for 40MHz (40MHz에서 1.6 dB 최소잡음지수를 얻는 잡음소거 기술에 근거한 광대역 저항성 LNA)

  • Choi Goangseog
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.20 no.2
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    • pp.63-74
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    • 2024
  • This Paper presents a resistive wideband fully differential low-noise amplifier (LNA) designed using a noise-cancellation technique for TV tuner applications. The front-end of the LNA employs a cascode common-gate (CG) configuration, and cross-coupled local feedback is employed between the CG and common-source (CS) stages. The moderate gain at the source of the cascode transistor in the CS stage is utilized to boost the transconductance of the cascode CG stage. This produces higher gain and lower noise figure (NF) than a conventional LNA with inductor. The NF can be further optimized by adjusting the local open-loop gain, thereby distributing the power consumption among the transistors and resistors. Finally, an optimized DC gain is obtained by designing the output resistive network. The proposed LNA, designed in SK Hynix 180 nm CMOS, exhibits improved linearity with a voltage gain of 10.7 dB, and minimum NF of 1.6-1.9 dB over a signal bandwidth of 40 MHz to 1 GHz.

6.2~9.7 GHz Wideband Low-Noise Amplifier Using Series RLC Input Matching and Resistive Feedback (직렬 RLC 입력 정합 및 저항 궤환 회로를 이용한 6.2~9.7 GHz 광대역 저잡음 증폭기 설계)

  • Park, Ji An;Cho, Choon Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.11
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    • pp.1098-1103
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    • 2013
  • A low-noise amplifier(LNA) using series RLC matching network and resistive feedback at 8 GHz is presented. Inductive degeneration is used for the input matching with which the proposed LNA shows quite a wide bandwidth in terms of $S_{21}$. An equivalent circuit model is deduced for input matching by conversion from parallel circuit to series resonant circuit. By exploiting the resistive feedback and series RLC input matching, fully integrated LNA achieves maximum $S_{21}$ of 8.5 dB(peak to -3 dB bandwidth is about 3.5 GHz) noise figure of 5.9 dB, and IIP3 of 1.6 dBm while consuming 7 mA from 1.2 V supply.

An Wideband GaN Low Noise Amplifier in a 3×3 mm2 Quad Flat Non-leaded Package

  • Park, Hyun-Woo;Ham, Sun-Jun;Lai, Ngoc-Duy-Hien;Kim, Nam-Yoon;Kim, Chang-Woo;Yoon, Sang-Woong
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.2
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    • pp.301-306
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    • 2015
  • An ultra-compact and wideband low noise amplifier (LNA) in a quad flat non-leaded (QFN) package is presented. The LNA monolithic microwave integrated circuit (MMIC) is implemented in a $0.25{\mu}m$ GaN IC technology on a Silicon Carbide (SiC) substrate provided by Triquint. A source degeneration inductor and a gate inductor are used to obtain the noise and input matching simultaneously. The resistive feedback and inductor peaking techniques are employed to achieve a wideband characteristic. The LNA chip is mounted in the $3{\times}3-mm^2$ QFN package and measured. The supply voltages for the first and second stages are 14 V and 7 V, respectively, and the total current is 70 mA. The highest gain is 13.5 dB around the mid-band, and -3 dB frequencies are observed at 0.7 and 12 GHz. Input and output return losses ($S_{11}$ and $S_{22}$) of less than -10 dB measure from 1 to 12 GHz; there is an absolute bandwidth of 11 GHz and a fractional bandwidth of 169%. Across the bandwidth, the noise figures (NFs) are between 3 and 5 dB, while the output-referred third-order intercept points (OIP3s) are between 26 and 28 dBm. The overall chip size with all bonding pads is $1.1{\times}0.9mm^2$. To the best of our knowledge, this LNA shows the best figure-of-merit (FoM) compared with other published GaN LNAs with the same gate length.

A 800MHz~5.8GHz Wideband CMOS Low-Noise Amplifier (800MHz~5.8GHz 광대역 CMOS 저잡음 증폭기 설계)

  • Kim, Hye-Won;Tak, Ji-Young;Lee, Jin-Ju;Shin, Ji-Hye;Park, Sung-Min
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.12
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    • pp.45-51
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    • 2011
  • This paper presents a wideband low-noise amplifier (LNA) covering 800MHz~5.8GHz for various wireless communication standards by utilizing in a 0.13um CMOS technology. Particularly, the LNA consists of two stages to improve the low-noise characteristics, that is, a cascode input stage and an output buffer with noise cancellation technique. Also, a feedback resistor is exploited to help achieve wideband impedance matching and wide bandwidth. Measure results demonstrate the bandwidth of 811MHz~5.8GHz, the maximum gain of 11.7dB within the bandwidth, the noise figure of 2.58~5.11dB. The chip occupies the area of $0.7{\times}0.9mm^2$, including pads. DC measurements reveal the power consumption of 12mW from a single 1.2V supply.

A Wideband Inductorless LNA for Inter-band and Intra-band Carrier Aggregation in LTE-Advanced and 5G

  • Gyaang, Raymond;Lee, Dong-Ho;Kim, Jusung
    • Journal of IKEEE
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    • v.23 no.3
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    • pp.917-924
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    • 2019
  • This paper presents a wideband low noise amplifier (LNA) that is suitable for LTE-Advanced and 5G communication standards employing carrier aggregation (CA). The proposed LNA encompasses a common input stage and a dual output second stage with a buffer at each distinct output. This architecture is targeted to operate in both intra-band (contiguous and non-contiguous) and inter-band CA. In the proposed design, the input and second stages employ a gm enhancement with resistive feedback technique to achieve self-biasing, enhanced gain, wide bandwidth as well as reduced noise figure of the proposed LNA. An up/down power controller controls the single input single out (SISO) and single input multiple outputs (SIMO) modes of operation for inter-band and intra-band operations. The proposed LNA is designed with a 45nm CMOS technology. For SISO mode of operation, the LNA operates from 0.52GHz to 4.29GHz with a maximum power gain of 17.77dB, 2.88dB minimum noise figure and input (output) matching performance better than -10dB. For SIMO mode of operation, the proposed LNA operates from 0.52GHz to 4.44GHz with a maximum voltage gain of 18.30dB, a minimum noise figure of 2.82dB with equally good matching performance. An $IIP_3$ value of -6.7dBm is achieved in both SISO and SIMO operations. with a maximum current of 42mA consumed (LNA+buffer in SIMO operation) from a 1.2V supply.

A S/C/X-Band GaN Low Noise Amplifier MMIC (S/C/X-대역 GaN 저잡음 증폭기 MMIC)

  • Han, Jang-Hoon;Kim, Jeong-Geun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.5
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    • pp.430-433
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    • 2017
  • This paper presents a S/C/X-band LNA MMIC with resistive feedback structure in 0.25 um GaN HEMT process. The GaN devices have advantages as a high output power device having high breakdown voltage, energy band gap and stability at high temperature. Since the receiver using the GaN device with high linearity can be implemented without a limiter, the noise figure of the receiver can be improved and the size of receiver module can be reduced. The proposed GaN LNA MMIC based on 0.25 um GaN HEMT device is achieved the gain of > 15 dB, the noise figure of < 3 dB, the input return loss of > 13 dB, and the output return loss of > 8 dB in the S/C/X-band. The current consumption of GaN LNA MMIC is 70 mA with the drain voltage 20 V and the gate voltage -3 V.