• Korean Journal of Optics and Photonics
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• v.17 no.6
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• pp.544-547
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• 2006

A time-domain modeling approach is used to study characteristics of a widely tunable coupled-ring reflector (CRR) laser diode(LD). The CRR consists of a bus waveguide and two coupled ring resonators coupled to the bus without resorting to distributed Bragg grating structure. The tuning range can be a few tens of nanometers with a side mode suppression ratio exceeding 35dB through the adjustment of currents into the phase control sections in the rings. The CRR laser diode has long effective cavity length compared to conventional laser diodes. Accordingly, a broad additional resonance peak in the amplitude modulation characteristics is observed between 20 to 30 GHz, implying the extension of amplitude modulation bandwidth.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.11
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• pp.1075-1081
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• 2004

In this paper, a VCO of a general advance warning system for vehicle's speed limitation in the X-band used in Japan is designed using a small signal scattering coefficient of PHEMT. A varactor diode that wide tuning range and series resistance 0 H is used for designing the VCO and -85 dBc/Hz of phase noise at 10 kHz of offset frequency is obtained by adjusting the reflection coefficient between the micro-strip line and the varactor device which determines transistor's operation voltage and resonant frequency, In addition +4.5 dBm of basic frequency signal output level and -25.6 dEc of the second harmonic constraint are acquired. Sample that produce in this paper could confirm that more excellent special quality appears than existing products in sensitivity.

• Journal of Power Electronics
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• v.12 no.4
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• pp.677-688
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• 2012

The vibratory conveyors with electromagnetic drive are used for performing gravimetric flow of granular materials in processing industry. By realizing free vibrations of variable intensity and frequency over a wide range through application of the electromagnetic actuator, suitable power converter, and the corresponding controller, continuous conveyance of granular materials have been provided for various operating conditions. Standard power output stages intended for control of vibratory conveyance using thyristors and triacs. Phase angle control can only accomplish tuning of amplitude oscillations, but oscillation frequency cannot be adjusted by these converters. Application of current controlled transistor converters enables accomplishing the amplitude and/or frequency control. Their use implies the excitation of a vibratory conveyor independent of the supply network frequency. In addition, the frequency control ensures operation in the region of mechanical resonance. Operation in this region is favourable from the energy point of view, since it requires minimal energy consumption. The paper presents a possible solution and advantages of the amplitude-frequency control of vibratory conveyors by means of a current controlled power converter.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.4
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• pp.552-560
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• 2017

This paper presents a transceiver chipset realized in a $0.13-{\mu}m$ CMOS technology for serial digital interface of video data transmission, which compensates the electrical cable loss of 45 dB in maximum at 1.5 Gbps. For the purpose, the TX equips pre-emphasis in the main driver by utilizing a D-FF with clocks generated from a wide-range tuning PLL. In RX, two-stage continuous-time linear equalizers and a limiting amplifier are exploited as a front-end followed by a 1/8-rate CDR to retime the data with inherent 1:8 demultiplexing function. Measured results demonstrate data recovery from 270 Mbps to 1.5 Gbps. The TX consumes 104 mW from 1.2/3.3-V supplies and occupies the area of $1.485mm^2$, whereas the RX dissipate 133 mW from a 1.2-V supply and occupies the area of $1.44mm^2$.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.2
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• pp.451-454
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• 2011

In this paper, a wideband clock generator using novel Automatic frequency calibration(AFC) scheme is proposed. Wideband clock generator using AFC has the advantage of small VCO gain and wide frequency band. The conventional AFC compares whether the feedback frequency is faster or slower then the reference frequency. However, the proposed AFC can detect frequency difference between reference frequency with feedback frequency. So it can be reduced an operation time than conventional methods AFC. Conventional AFC goes to the initial code if the frequency step changed. This AFC, on the other hand, can a prior state code so it can approach a fast operation. In simulation results, the proposed clock generator is designed for DisplayPort using the CMOS ring-VCO. The VCO tuning range is 350MHz, and a VCO frequency is 270MHz. The lock time of clock generator is less then 3us at input reference frequency, 67.5MHz. The phase noise is -109dBC/Hz at 1MHz offset from the center frequency. and power consumption is 10.1mW at 1.8V supply and layout area is $0.384mm^2$.

• Proceedings of the KIEE Conference
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• 2009.04b
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• pp.32-34
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• 2009

The field oriented control of induction motors is widely used in high performance applications. However, detuning caused by parameter disturbance still limits the performance of these drives. In order to accomplish variable speed operation, conventional PI-like controllers are commonly used. These controllers provide limited good Performance over a wide range of operation, even under ideal field oriented conditions. This paper is proposed model reference adaptive fuzzy control(MFC) and artificial neural network(ANN) based on the vector controlled induction motor drive system. Also, this paper is proposed control of speed and current using fuzzy adaption mechanism(FAM), MFC and estimation of speed using ANN. The proposed control algorithm is applied to induction motor drive system using FAM, MFC and ANN controller. Also, this paper is proposed the analysis results to verify the effectiveness of this controller.

• Current Optics and Photonics
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• v.3 no.5
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• pp.401-407
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• 2019

Polymeric optical waveguide devices with Bragg gratings have been investigated, for implementing tunable lasers and wavelength filters used in wavelength-division-multiplexed optical communication systems. Owing to the excellent thermo-optic effect of these polymers, wavelength tuning is possible over a wide range, which is difficult to achieve using other optical materials. In this study the phase-mask technology, which has advantages over the conventional interferometeric method, was introduced to facilitate the fabrication of Bragg gratings in polymeric optical waveguide devices. An optical setup capable of fabricating multiple Bragg gratings simultaneously on a 4-inch silicon wafer was constructed, using a 442-nm laser and phase mask. During fabrication, some of the diffracted light in the phase mask was totally reflected inside the mask, which affected the quality of the Bragg grating adversely, so experiments were conducted to solve this issue. To verify grating uniformity, two types of wavelength-filtering devices were fabricated using the phase-mask lithography, and their reflection and transmission spectra were measured. From the results, we confirmed that the phase-mask method provides good uniformity, and may be applied for mass production of polymer Bragg-grating waveguide devices.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.16 no.6
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• pp.231-237
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• 2016

This paper presents a multiband low phase noise CMOS VCO with wide frequency tunability using switched bondwire inductor bank. The combination of bondwire inductor and CMOS switch transistor enhances frequency tunability and improves phase noise characteristics. The proposed multiband VCO operates from 2.3GHz to 6.3GHz with phase noise of -136dBc/Hz and -122dBc/Hz at 1 MHz offset frequency, respectively. Switched bondwire inductor bank shows high quality factor(Q) at each frequency band, which allows better tradeoff between phase noise and power consumption. The proposed VCO is designed in TSMC 0.18um CMOS process and consumes 7.2 mW power resulting in figure of merit(FOM) of -189.3dBc/Hz at 1 MHz offset from 6GHz carrier frequency.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.6
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• pp.87-93
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• 2008

This paper describes implementation of the 5.0GHz RF frequency synthesizer with $0.18{\mu}m$ silicon CMOS technology being used as an application of the IEEE802.15.4 USN sensor node transceiver modules. To get good performance of speed and noise, design of the each module like VCO, prescaler, 1/N divider, fractional divider with ${\Sigma}-{\Delta}$ modulator, and common circuits of the PLL has been optimized. Especially to get good performance of speed, power consumption, and wide tuning range, N-P MOS core structure has been used in design of the VCO. The chip area including pads for testing is $1.1*0.7mm^2$, and the chip area only core for IP in SoC is $1.0*0.4mm^2$. Through comparing and analysing of the designed two kind of the frequency synthesizer, we can conclude that if we improve a litter characteristics there is no problem to use their as IPs.

• Journal of IKEEE
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• v.14 no.1
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• pp.65-74
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• 2010

The Digital TV(DTV) standard has ushered in a new era in TV broadcasting and raised a great demand for DTV tuners. There are many challenges in designing a DTV tuner, of which the most difficult part is the frequency synthesizer. This paper presents the design of a frequency synthesizer for DTV Tuners in a $0.18{\mu}m$ CMOS process. It satisfies the DTV(ATSC) frequency band(54~806MHz). A scheme is proposed to cover the full band using only one VCO. The VCO has been designed to operate at 1.6~3.6GHz band such that the LO pulling effect is minimized, and reliable broadband characteristics have been achieved by reducing the variations of VCO gain and frequency step. The simulation results show that the designed VCO has gains of 59~94MHz(${\pm}$17.7MHz/V,${\pm}$23%) and frequency steps of 26~42.5MHz(${\pm}$8.25MHz/V,${\pm}$24%), and a very wide tuning range of 76.9%. The designed frequency synthesizer has a phase noise of -106dBc/Hz at 100kHz offset, and the lock time is less than $10{\mu}$sec. It consumes 20~23mA from a 1.8V supply, and the chip size including PADs is 2.0mm${\times}$1.8mm.