• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.7
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• pp.831-841
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• 2010

The conventional vertical probe has the thin and long signal path that makes transfer characteristic of probe worse because of the S-shaped structure. So we propose the new vertical probe structure that has branch springs in the S-shaped probe. It makes closed loop when the probe mechanically connects to the electrode on a wafer. We fabricated the proposed vertical probe and measured the transfer characteristic and mechanical properties. Compared to the conventional S-shaped vertical probe, the proposed probe has the overdrive that is 1.2 times larger and the contact force that is 2.5 times larger. And we got the improved transfer characteristic by 1.4 dB in $0{\sim}10$ GHz. Also we developed the simulation model of the probe card by using full-wave simulator and the simulation result is correlated with measurement one. As a result of this simulation model, the cantilever probe and PCB have the worst transfer characteristic in the probe card.

• Journal of Sensor Science and Technology
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• v.8 no.3
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• pp.265-273
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• 1999

Various oxide films are commonly used as a sacrificial layer or etch mask in the fabrication of microelectromechanical systems (MEMS). Large residual strain of these oxide films causes the wafer to bow, which can have detrimental effects on photolithography and other ensuing processes. This paper investigates the residual strain of tetraethoxysilane (TEOS), low temperature oxide (LTO), 7 wt% and 10 wt% phosphosilicate glass (PSG). Euler beams and a bent-beam strain sensor are used to measure the residual strain. A poly silicon layer is used as the sacrificial layer, which is selectively etched away by $XeF_2$. First, the residual strain of as-deposited films is measured, which is quite large. The residual strain of the films is also measured after annealing them not only at $500^{\circ}C$, $600^{\circ}C$, $700^{\circ}$ and $800^{\circ}C$ in $N_2$ environment for 1 hour but also at the conditions for depositing a $2\;{\mu}m$ thick polysilicon at $585^{\circ}C$ and $625^{\circ}C$. Our results show that the 7 wt% PSG is best suited as the sacrificial layer for $2\;{\mu}$ thick polysilicon processes.

• Journal of Sensor Science and Technology
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• v.6 no.5
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• pp.407-413
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• 1997

The crystallized CuPc(copper phthalocyanine) film on a p-type <100> Si substrate is prepared at the substrate temperature of $300^{\circ}C$ by thermal evaporation. X -ray diffraction analysis showed the CuPc film to have a-axis oriented structure. For the measurement of photovoltaic characteristics of the CuPc/Si film and the Si substrate, a transverse current-voltage (I-V) curve is observed. In the dark, the Au/Si junction is shown to be ohmic contact. However, under illumination, a photovoltaic effect is not observed. The I-V curve in the dark indicates that the CuPc film on Si may form an ohmic contact. Since the CuPc film is a p-type semiconductor, the CuPc/p-Si junction has no barrier at the interface. Under illumination, the CuPc/Si junction shows a large photocurrent comparing with that of the wafer. The result indicates that the CuPc layer plays an important role in the photocarrier generation under red illumination (600 nm). The CuPc/Si film shows the photo voltaic characteristics with a short-circuit photocurrent ($J_{sc}$) of $4.29\;mA/cm^{2}$ and an open-circuit voltage ($V_{oc}$) of 12 mA.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.1
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• pp.64-71
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• 2020

eFuse OTP memory IP is required to trim the analog circuit of the gate driving chip of the power semiconductor device. Conventional NMOS diode-type eFuse OTP memory cells have a small cell size, but require one more deep N-well (DNW) mask. In this paper, we propose a small PMOS-diode type eFuse OTP memory cell without the need for additional processing in the CMOS process. The proposed PMOS-diode type eFuse OTP memory cell is composed of a PMOS transistor formed in the N-WELL and an eFuse link, which is a memory element and uses a pn junction diode parasitic in the PMOS transistor. A core driving circuit for driving the array of PMOS diode-type eFuse memory cells is proposed, and the SPICE simulation results show that the proposed core circuit can be used to sense post-program resistance of 61㏀. The layout sizes of PMOS-diode type eFuse OTP memory cell and 512b eFuse OTP memory IP designed using 0.13㎛ BCD process are 3.475㎛ × 4.21㎛ (= 14.62975㎛2) and 119.315㎛ × 341.95㎛ (= 0.0408mm2), respectively. After testing at the wafer level, it was confirmed that it was normally programmed.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.9
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• pp.502-507
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• 2016

Vanadium dioxide, $VO_2$, is a thermochromic material that exhibits a reversible metal-insulator phase transition at $68^{\circ}C$, which accompanies rapid changes in the optical and electronic properties. To decrease the transition temperature around room temperature, a number of studies have been performed. The phase transition temperature of 1D nanowire $VO_2$ with a 100 nm diameter was reported to be approximately $29^{\circ}C$. In this study, 1D or 2D nanostructured $VO_2$ was grown using the vapor transport method. Vanadium dioxide has a different morphology with the same growth conditions for different substrates. The 1D nanowires $VO_2$ were grown on a Si substrate ($Si{\setminus}SiO_2$(300 nm), whereas the 2D & 3D nanostructured $VO_2$ were grown on an exfoliated graphene nanosheet. The crystallographic properties of the 1D or 2D & 3D nanostructured $VO_2$, which were grown by thermal CVD, and exfoliated-transferred graphene nanosheets on a Si wafer which was used as substrate for the vanadium oxide nanostructures, were analyzed by Raman spectroscopy. The as-grown vanadium oxide nanostructures have a $VO_2$ phase, which are confirmed by Raman spectroscopy.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.12 no.4
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• pp.366-372
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• 2019

In this paper, we fabricated a capacitive humidity sensor with an IDT(Interdigitated) electrode using commercial polyimide containing fluorine, and its properties were measured and analyzed. First, in order to analyze the composition of commercial polyimide, EDS analysis was performed after patterning process on a silicon wafer. The area of the humidity sensor was $1.56{\times}1.66mm^2$, and the width of the electrode and the gap between the electrodes were $3{\mu}m$ each. The number of electrodes was 166 and the length of the electrode was 1.294mm for the sensitivity of the sensor. The fabricated sensor showed that the sensitivity was 24 fF/%RH, linearity <${\pm}2.5%RH$ and hysteresis <${\pm}4%RH$. As a result of measuring the capacitance value according to the frequency change, the capacitance vlaue decreased with increasing frequency. Capacitance deviations with 10kHz and 100kHz were measured as 0.3pF on average.

• Journal of IKEEE
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• v.26 no.3
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• pp.422-429
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• 2022

A light sensor chip requires a small capacity eFuse (electrical fuse) OTP (One-Time Programmable) memory IP (Intellectual Property) to trim analog circuits or set initial values of digital registers. In this paper, 128-bit eFuse OTP IP is designed using only 3.3V MV (Medium Voltage) devices without using 1.8V LV (Low-Voltage) logic devices. The eFuse OTP IP designed with 3.3V single MOS devices can reduce a total process cost of three masks which are the gate oxide mask of a 1.8V LV device and the LDD implant masks of NMOS and PMOS. And since the 1.8V voltage regulator circuit is not required, the size of the illuminance sensor chip can be reduced. In addition, in order to reduce the number of package pins of the illumination sensor chip, the VPGM voltage, which is a program voltage, is applied through the VPGM pad during wafer test, and the VDD voltage is applied through the PMOS power switching circuit after packaging, so that the number of package pins can be reduced.

• Journal of Conservation Science
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• v.38 no.2
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• pp.96-108
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• 2022

To understand the process of publication and distribution of ancient Korean novels under the Joseon dynasty and Japanese occupation, collecting information on the publication of various printed materials and estimating their publication date through various methods is extremely important. In this study, the characteristics and differences that appeared in the woodblock printing process were investigated using image comparison among editions of the Honggildongjeon (Tale of Honggildong) of Wanpanbon (完板本) (published in the Jeonju region) with other commercial editions of the ancient Korean novels. Additionally, the publication year of each edition was estimated. Printed images of different versions were compared with those of a recently discovered original series version and the changes in the process of carving replacement woodblocks were investigated and summarized. Various phenomena, such as differences in fonts, borderline shapes and integrity of printed characters, appearing in woodblock prints provided useful information for determining chronological relationships between the prints and estimating the approximate publication year for each edition. The various characteristics of woodblock printing obtained through this study are expected to serve as a reference for estimating the relationship between the printing method and the approximate publication date of old books and paper-based printed historical records.

• Clean Technology
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• v.16 no.3
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• pp.191-197
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• 2010

Repair reaction of plasma damaged porous methyl doped SiOCH films was carried out with silylation agents dissolved in supercritical carbon dioxide ($scCO_2$) at various reaction time, pressure, and temperature. While a decrease in the characteristic bands at $3150{\sim}3560cm^{-1}$ was detectable, the difference of methyl peaks was not identified apparently in the FT-IR spectra. The surface hydrophobicity was rapidly recovered by the silylation. In order to induce effective repair in bulk phase, the wafer was heat treated before reaction under vacuum or ambient condition. The contact angle was slightly increased after the treatment and completely recovered after the subsequent silylation. Methyl groups were decreased after the plasma damage, but their recovery was not identified apparently from the FT-IR, spectroscopic ellipsometry, and secondary ion mass spectroscopy analyses. Furthermore, Ti evaporator was performed in a vacuum chamber to evaluate the pore sealing effect. The GDS analysis revealed that the open pores in the plasma damaged films were efficiently sealed with the silylation in $scCO_2$.

• Journal of the Korean Magnetics Society
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• v.5 no.2
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• pp.128-133
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• 1995

Yttrium Iron Garnet($Y_{3}Fe_{5)O_{12}$) films have been succsssfully grown on(111)GGG wafer by KrF excimer laser ablation of stoichiometric garnet target at the oxygen partial pressure, $P(O_{2}$, ranging 20 to 500 mTorr. During the deposition of the films the substrate temperature was maintained at $700^{\circ}C$ and the laser beam energy density at $7.75\;J/cm_{2}$. Microstructure, composition and magnetic properties of the films obtained were investigated as a function of oxygen pressure and thickness of the films. Epitaxial films with a dense and a smooth surface were reproducible at a low oxygen pressure. The films of $2.75\;{\mu}$ min thickness deposited at 20 mTorr of $P(O_{2})$ showed $4{\pi}M_{s}$ of 1500 Gauss and $H_{c}$ of 3 Oe after annealing at $800\;^{\circ}C$ for 20 minutes. As-deposited films of $0.8\;\mu\textrm{m}$ in thickness exhibited the $4{\pi}M_{s}$ of 1730 Gauss and $H_{c}$ of 7 Oe. The magnetic properties of the films obtained were almost identical to those of a single crystal YIG.