• Transactions of the Korean Society of Mechanical Engineers B
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• v.22 no.5
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• pp.651-660
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• 1998

In the LPCVD reactor the temperature variations within the wafer load are the most important factor to maintain the thickness of the materials deposited on the surface of the wafer constant and to affect the deformation of each wafer. In this study the temporal variations of radial and axial temperature nonuniformities of each wafer in the LPCVD reactor are numerically estimated by assuming diffuse reflection. To verify the validity of the present numerical results, the present results obtained from the transient analysis are compared with those of Badgwell's work in which a steady-state condition was assumed. The main objective of this work is to determine the temporal variations of the temperature of each wafer in the LPCVD process since the wafers experience severe change in temperature in the early stage of the process.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.25 no.10
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• pp.1535-1540
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• 2001

This study presents the possibility of scratch reduction on wafer in CMP by applying the ultrasonic and megasonic energy into the slurry which might contain large abrasive particles. Experiments were conducted to verify the dispersion ability of agglomerated particles by applying ultrasonic, megasonic waves and analyze the particle distribution of used slurry in case, of sonic energy assisted or none. And the dispersion stability of megasonic waves was investigated through the experiment of stability of the dispersed slurry, Finally, to confirm that the distribution of particles in slurry by ultrasonic waves was actually related to scratches on wafer when CMP was done, tungsten blanket wafer was processed, by CMP to compare and investigate scratches on wafer.

• Proceedings of the Korean Society of Laser Processing Conference
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• 2006.11a
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• pp.128-132
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• 2006

Low-k wafer engraving process has been investigated by using UV pico-second laser with high repetition rate. Wavelength and repetition rate of laser used in this study are 355nm and 80MHz, respectively. Main parameters of low-k wafer engraving processes are laser power, work speed, assist gas flow rate, and protective coating to eliminate debris. Results show that engraving qualities of low-k layer by using UV pico-second pulse width and high repetition rate had better kerf edge and higher work speed, compared to one by conventional laser with nano-second pulse width and low repetition rate in the range of kHz. Assist gas and protective coating to eliminate debris gave effects on the quality of engraving edge. Total engraving width and depth are obtained less than $20{\mu}m$ and $10{\mu}m$ at more than 500mm/sec work speed, respectively. We believe that engraving method by using UV pico-second laser with high repetition rate is useful one to give high work speed of laser material process.

• Journal of the Korea Society for Simulation
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• v.15 no.2
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• pp.51-57
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• 2006

Production environment of semiconductor industry is shifting from 200mm wafer process to 300mm wafer process. In the new era of semiconductor industry, FAB (fabrication) Line Automation is a key issue that semiconductor industry is facing in shifting from 200mm wafer fabrication to 300mm wafer fabrication. In addition, since the semiconductor manufacturing technologies are being widely spread and market competitions are being stiffened, cost-down techniques became basis of growth. Most companies are trying to reduce average cycle time to increase productivity and delivery time. In this paper, we simulated 300mm wafer fabrication semiconductor manufacturing process by laying great emphasis on reduce average cycle time.

• Korean Journal of Materials Research
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• v.16 no.10
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• pp.652-655
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• 2006

A direct wafer bonding process necessary for GaAs-on-insulator (GOI) fabrication with high thermal annealing temperatures was studied by using PECVD oxides between gallium arsenide and silicon wafers. In order to apply some uniform pressure on initially-bonded wafer pairs, a graphite sample holder was used for wafer bonding. Also, a tool for measuring the tensile forces was fabricated to measure the wafer bonding strengths of both initially-bonded and thermally-annealed samples. GaAs/$SiO_2$/Si wafers with 0.5-$\mu$m-thick PECVD oxides were annealed from $100^{\circ}C\;to\;600^{\circ}C$. Maximum bonding strengths of about 84 N were obtained in the annealing temperature range of $400{\sim}500^{\circ}C$. The bonded wafers were not separated up to $600^{\circ}C$. As a result, the GOI wafers with high annealing temperatures were demonstrated for the first time.

• Journal of the Semiconductor & Display Technology
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• v.16 no.2
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• pp.55-60
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• 2017

The supercritical $CO_2$ (sc-$CO_2$) mixture and the sc-$CO_2$-based Photoresist(PR) stripping(SCPS) process were applied to the removal of the post etch/ash PR residue on aluminum patterned wafers and the results were observed by scanning of electron microscope(SEM). In the case of MDII wafers, the carbonized PR was able to be effectively removed without pre-stripping by oxygen plasma ashing by using sc-$CO_2$ mixture containing the optimum formulated additives at the proper pressure and temperature, and the same result was also able to be obtained in the case of HDII wafer. It was found that the efficiency of SCPS of ion implanted wafer improved as the temperature of SCPS was high, so a very large amount of MEA in the sc-$CO_2$ mixture could be reduced if the temperature could be increased at condition that a process permits, and the ion implanted photoresist(IIP) on the wafer was able to be removed completely without pre-treatment of plasma ashing by using the only 1 step SCPS process. By using SCPS process, PR polymers formed on sidewalls of metal conductive layers such as aluminum films, titanium and titanium nitride films by dry etching and ashing processes were removed effectively with the minimization of the corrosion of the metal conductive layers.

• Journal of the Semiconductor & Display Technology
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• v.20 no.2
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• pp.19-24
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• 2021

As the size of semiconductor devices decreases, the etching pattern becomes very narrow and a deep high aspect ratio process becomes important. The cryogenic etching process enables high aspect ratio etching by suppressing the chemical reaction of reactive ions on the sidewall while maintaining the process temperature of -100℃. ESC is an important part for temperature control in cryogenic etching equipment. Through the cooling path inside the ESC, liquid nitrogen is used as cooling water to create a cryogenic environment. And since the ESC directly contacts the wafer, it affects the temperature uniformity of the wafer. The temperature uniformity of the wafer is closely related to the yield. In this study, the cooling path was designed and analyzed so that the wafer could have a uniform temperature distribution. The optimal cooling path conditions were obtained through the analysis of the shape of the cooling path and the change in the speed of the coolant. Through this study, by designing ESC with optimal temperature uniformity, it can be expected to maximize wafer yield in mass production and further contribute to miniaturization and high performance of semiconductor devices.

• Journal of the Semiconductor & Display Technology
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• v.22 no.3
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• pp.8-13
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• 2023

High bandwidth memory a core technology of the future memory semiconductor industry, is attracting attention. Temporary bonding and debonding process technology, which plays an important role in high bandwidth memory process technology, is also being studied. In this process, total thickness variation is a major factor determining wafer performance. In this study, the reliability of the equipment measuring total thickness variation is identified, and the servo motor settling, and wafer total thickness variation measurement accuracy are analyzed. As for the experimental variables, vacuum, acceleration time, and speed are changed to find the most efficient value by comparing the stabilization time. The smaller the vacuum and the larger the radius, the longer the settling time. If the radius is small, high-speed rotation performance is good, and if the radius is large, low-speed rotation performance is good. In the future, we plan to conduct an experiment to measure the entire of the wafer.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.850-853
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• 1992

A cryogenic electron cyclotron resonance plasma etching system has been built to study wafer-temperature in the silicon etching characteristics. The wafer temperature was controlled from -150 to +30 $^{\circ}C$ during etching using the liquid nitrogen cooled helium gas. Although silicon was etched isotropically in $SF_6$ plasma at room temperatures, we found that it is possible to suppress the etch undercut in Si by reducing a substrate temperature without side wall passivation. In addition, the selectivity of silicon to photoresist was improved considerably at a low wafer temperature. Etch rates, anisotropy and selectivity to photo resist are measured as a function of the wafer temperature in the region of -125 $\sim$ 25$^{\circ}C$ and rf bias power of 20W $\sim$ 80W.

• Journal of KSNVE
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• v.8 no.2
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• pp.324-330
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• 1998

The forced vibration analysis of the outer-clamped spinnig annular disk with arbitrary in-plane is formulated to investigate the influence of non-uniform tension on the cutting accuracy of wafer cutting machine. The arbitrary in-plan force along the outer edge of an annular plate is expressed as a Fourier series. Galerkin method and modal superposition method are employed to obtain the forced responses under the static force and the impulse force in astationary coordinate. Through qualitative and quantitative analyses, it can be found that forced and impulse responses are sensitive to the non-uniformity of in-plane force, which can bring a bad effect to the accuracy of wafer cutting process. Also, in case of a spinning disk with non-uniform in-plane force, critical speed is required to define in a different way, compared with conventional definition in axi-symmetrical spinning disk.