• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.2
• /
• pp.830-833
• /
• 2003

This paper describes the fabrication and characteristics of 3C-SiCOI sotctures by SDB and etch-back technology for high-temperature MEMS applications. In this work, insulator layers were formed on a heteroepitaxial 3C-SiC film grown on a Si(001) wafer by thermal wet oxidation and PECVD process, successively. The pre-bonding of two polished PECVD oxide layers made the surface activation in HF and bonded under applied pressure. The wafer bonding characteristics were evaluated by the effect of HF concentration used in the surface treatment on the roughness of the oxide and pre-bonding strength. Hydrophilic character of the oxidized 3C-SiC film surface was investigated by ATR-FTIR. The strength of the bond was measured by tensile strengthmeter. The bonded interface was also analyzed by SEM. The properties of fabricated 3C-SiCOI structures using etch-back technology in TMAH solution were analyzed by XRD and SEM. These results indicate that the 3C-SiCOI structure will offers significant advantages in the high-temperature MEMS applications.

• 한국재료학회지
• /
• 제10권10호
• /
• pp.665-670
• /
• 2000

실온에서 직접 접합된 실리콘 기판의 접합강도를 향상기키기 위하여 기존의 고온 로내 열처리법을 대체할 수 있는 선형 열처리법을 개발하였다. 한 개의 열원과 타원형 반사경으로 구성된 선형 열처리법은 접합면의 간격이 열처리 온도의 증가와 더불어 감소하는 특성과 온도 증가와 더불어 접합면에 생성된는 기체상의 밀도가 증가하는 현상을 응용하여 접합면의 기체상을 밀도차이를 이용하여 기판 외부로 방출시키는 방법으로 Si$\mid$$\mid$Si 기판쌍 및 Si$\mid$$\mid$$SiO_2/Si$ 기판쌍의 직접 접합에 적용하여 보았다. IR camera와 HRTEM으로 직접 관찰한 접합면은 실온에서 접합면에 침투한 외부 불순물에 의한 비접합 영역을 제외하고는 자제 생성된 기체상에 의한 비접합 영역은 나타나지 않았고 매우 깨끗한 접합계면을 나타내었다. 접합된 기판쌍을 Crack opening법과 인장시험법을 적용하여 접합 강도를 측정하였다. 접합 강도는 열처리 온도의 증가와 더불어 점차로 증가하였고 두 측정방법 모두 동일한 경향성을 나타내었다.

• 한국광학회:학술대회논문집
• /
• 한국광학회 2005년도 제16회 정기총회 및 동계학술발표회
• /
• pp.170-171
• /
• 2005

• 한국광학회:학술대회논문집
• /
• 한국광학회 2004년도 하계학술발표회
• /
• pp.184-185
• /
• 2004

• 한국재료학회:학술대회논문집
• /
• 한국재료학회 1998년도 IUMRS-ICEM ABSTRACT BOOK
• /
• pp.72.2-72
• /
• 1998

• 한국표면공학회:학술대회논문집
• /
• 한국표면공학회 2018년도 춘계학술대회 논문집
• /
• pp.102-102
• /
• 2018

Electronic industry had required the finer size and the higher performance of the device. Therefore, 3-D die stacking technology such as TSV (through silicon via) and micro-bump had been used. Moreover, by the development of the 3-D die stacking technology, 3-D structure such as chip to chip (c2c) and chip to wafer (c2w) had become practicable. These technologies led to the appearance of HBM (high bandwidth memory). HBM was type of the memory, which is composed of several stacked layers of the memory chips. Each memory chips were connected by TSV and micro-bump. Thus, HBM had lower RC delay and higher performance of data processing than the conventional memory. Moreover, due to the development of the IT industry such as, AI (artificial intelligence), IOT (internet of things), and VR (virtual reality), the lower pitch size and the higher density were required to micro-electronics. Particularly, to obtain the fine pitch, some of the method such as copper pillar, nickel diffusion barrier, and tin-silver or tin-silver-copper based bump had been utillized. TCB (thermal compression bonding) and reflow process (thermal aging) were conventional method to bond between tin-silver or tin-silver-copper caps in the temperature range of 200 to 300 degrees. However, because of tin overflow which caused by higher operating temperature than melting point of Tin ($232^{\circ}C$), there would be the danger of bump bridge failure in fine-pitch bonding. Furthermore, regulating the phase of IMC (intermetallic compound) which was located between nickel diffusion barrier and bump, had a lot of problems. For example, an excess of kirkendall void which provides site of brittle fracture occurs at IMC layer after reflow process. The essential solution to reduce the difficulty of bump bonding process is copper to copper direct bonding below $300^{\circ}C$. In this study, in order to improve the problem of bump bonding process, copper to copper direct bonding was performed below $300^{\circ}C$. The driving force of bonding was the self-annealing properties of electrodeposited Cu with high defect density. The self-annealing property originated in high defect density and non-equilibrium grain boundaries at the triple junction. The electrodeposited Cu at high current density and low bath temperature was fabricated by electroplating on copper deposited silicon wafer. The copper-copper bonding experiments was conducted using thermal pressing machine. The condition of investigation such as thermal parameter and pressure parameter were varied to acquire proper bonded specimens. The bonded interface was characterized by SEM (scanning electron microscope) and OM (optical microscope). The density of grain boundary and defects were examined by TEM (transmission electron microscopy).

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 1994년도 추계학술대회 논문집
• /
• pp.86-89
• /
• 1994

This paper describes the fabrication and basic characteristics of a Si Hall device fabricated on a SOI(Si-on-insulator) structure. In which SOI structure was formed by SOB(Si-wafer direct bonding) technology and the insulator of the SOI structure was used as the dielectrical isolation layer of a Hall device. The Hall voltage and sensitivity of the implemented SDB SOI Hall devices showed good linearity with respectivity to the applied magnetic flux density and supple iud current. The product sensitivity of the SDB SOI Hall device was average 670 V/A$.$T and its value has been increased up to 3 times compared to that of bulk Si with buried layer of 10$\mu\textrm{m}$. Moreover, this device can be used at high-temperature, high-radiation and in corrosive environments.

• 센서학회지
• /
• 제1권2호
• /
• pp.131-145
• /
• 1992

본 논문은 SOI트랜스듀서 및 회로를 위해, Si 직접접합과 M-C국부연마법에 의한 박막SOI구조의 형성 공정을 기술한다. 또한, 이러한 박막SOI의 전기적 및 압저항효과 특성들을 SOI MOSFET와 cantilever빔으로 각각 조사했으며, bulk Si에 상당한다는 것이 확인되었다. 한편, SOI구조를 이용한 두 종류의 압력트랜스듀서를 제작 및 평가했다. SOI구조의 절연층을 압저항의 유전체분리층으로 이용한 압력트랜스듀서의 경우, $-20^{\circ}C$에서 $350^{\circ}C$의 온도범위에 있어서 감도 및 offset전압의 변화는 자각 -0.2% 및 +0.15%이하였다. 한편, 절연층을 etch-stop막으로 이용한 압력트랜스듀서에 있어서의 감도변화를 ${\pm}2.3%$의 표준편차 이내로 제어할 수 있다. 이러한 결과들로부터 개발된 SDB공정으로 제작된 SOI구조는 집적화마이크로트랜스듀서 및 회로개발에 많은 장점을 제공할 것이다.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1999년도 하계학술대회 논문집 G
• /
• pp.3279-3281
• /
• 1999

This paper describes a method of direct wafer bonding using surfaces activated by a radio-frequency hydrogen plasma. The hydrogen plasma cleaning of silicon in the RIE mode was investigated as a pretreatment for silicon direct bonding. The cleaned silicon surface was successfully terminated by hydrogen, The hydrogen-terminated surfaces were rendered hydrophilic, which could be wetted by Dl water rinse. Two wafers of silicon and silicon dioxide were contacted to each other at room temperature and postannealed at $300{\sim}1100^{\circ}C$ in an $N_2$ atmosphere for 2 h. From the AFM results, it was revealed that the surface became rougher with the increased plasma exposure time and power. The effect of the plasma treatment on the surface chemistry was investigated by the AES analysis. It was shown that the carbon contamination at the surface could be reduced below 5 at %. The interfacial energy measured by the crack propagation method was 122 $mJ/m^2$ and 384 $mJ/m^2$ for RCA cleaning and hydrogen plasm, respectively.

• 전자공학회논문지
• /
• 제50권6호
• /
• pp.305-310
• /
• 2013

본 연구는 Si/$SiO_2$/Si-sub 구조의 SDB(silicon-direct-bonding) 웨이퍼를 이용한 고온용 압력센서의 제작 및 특성을 연구한 것이다. 압력센서는 SDB 웨이퍼의 첫 번째 층의 단결정 실리콘을 이용하여 압저항을 제작하기 때문에 감도가 우수하며, 두 번째 층의 산화막으로 압저항과 실리콘 기판을 절연 분리하여, 일반적인 실리콘소자의 사용 온도 한계인 $120^{\circ}C$ 이상의 고온에서도 사용이 가능하다. 제작된 압력센서는 고감도의 압력감도 및 센서 출력의 직선성 및 히스테리시스 특성이 매우 우수함을 알 수 있었다.