• Title/Summary/Keyword: Wafer Shape

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A Low- Viscousity, Highly Thermally Conductive Epoxy Molding Compound (EMC)

  • Bae, Jong-Woo;Kim, Won-Ho;Hwang, Seung-Chul;Choe, Young-Sun;Lee, Sang-Hyun
    • Macromolecular Research
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    • v.12 no.1
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    • pp.78-84
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    • 2004
  • Advanced epoxy molding compounds (EMCs) should be considered to alleviate the thermal stress problems caused by low thermal conductivity and high elastic modulus of an EMC and by the mismatch of the coefficient of thermal expansion (CTE) between an EMC and the Si-wafer. Though A1N has some advantages, such as high thermal conductivity and mechanical strength, an A1N-filled EMC could not be applied to commercial products because of its low fluidity and high modules. To solve this problem, we used 2-$\mu\textrm{m}$ fused silica, which has low porosity and spherical shape, as a small size filler in the binary mixture of fillers. When the composition of the silica in the binary filler system reached 0.3, the fluidity of EMC was improved more than twofold and the mechanical strength was improved 1.5 times, relative to the 23-$\mu\textrm{m}$ A1N-filled EMC. In addition, the values of the elastic modules and the dielectric constant were reduced to 90%, although the thermal conductivity of EMC was reduced from 4.3 to 2.5 W/m-K, when compared with the 23-$\mu\textrm{m}$ A1N-filled EMC. Thus, the A1N/silica (7/3)-filled EMC effectively meets the requirements of an advanced electronic packaging material for commercial products, such as high thermal conductivity (more than 2 W/m-K), high fluidity, low elastic modules, low dielectric constant, and low CTE.

Evaluation of Elastic Properties of DLC Films Using Substrate Etching Techniques (기판 Etching 기법을 이용한 DLC 필름의 탄성특성 평가)

  • 조성진;이광렬;은광용;한준희;고대홍
    • Journal of the Korean Ceramic Society
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    • v.35 no.8
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    • pp.813-818
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    • 1998
  • A simple method to measure the elastic modulus E and Poisson's ratio v of diamod-like carbon (DLC) films deposited on Si wafer was suggested. Using the anisotropic etching technique of Si we could make the edge of DLC overhang free from constraint of Si substrate. DLC film is chemically so inert that we could not on-serve any surface damage after the etching process. The edge of DLC overhang free from constraint of Si substrate exhibited periodic sinusoidal shape. By measuring the amplitude and the wavelength of the sinu-soidal edge we could determine the stain of the film required to adhere to the substrate. Since the residual stress of film can be determine independently by measurement of the curvature of film-substrate com-posite we could calculated the biaxial elastic modulus E/(1-v) using stress-strain relation of thin films. By comparing the biaxial elastic modulus with the plane-strain modulus E/(1-{{{{ { v}^{2 } }}) measured by nano-in-dentation we could further determine the elastic modulus and Poisson's ratio independently. This method was employed to measure the mechanical properties of DLC films deposited by {{{{ { {C }_{6 }H }_{6 } }} rf glow discharge. The was elastic modulus E increased from 94 to 169 GPa as the {{{{ { V}_{ b} / SQRT { P} }} increased from 127 to 221 V/{{{{ {mTorr }^{1/2 } }} Poisson's ratio was estimated to be abou 0.16∼0.22 in this {{{{ { V}_{ b} / SQRT { P} }} range. For the {{{{ { V}_{ b} / SQRT { P} }} less than 127V/{{{{ {mTorr }^{1/2 } }} where the plastic deformation can occur by the substrate etching process however the present method could not be applied.

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Utilizing Advanced Pad Conditioning and Pad Motion in WCMP

  • Kim, Sang-Yong;Chung, Hun-Sang;Park, Min-Woo;Kim, Chang-Il;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11a
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    • pp.171-175
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    • 2001
  • Chemical mechanical polishing(CMP) process has been widely used to planarize dielectrics and metal, which can apply to employed in integrated circuits for sub-micron technology. Despite the increased use of CMP process, it is difficult to accomplish the global planarization of free-defects in inter level dielectrics and metal. Especially, defects like (micro-scratch) lead to severe circuit failure, and affects yield. Current conditioning method - bladder type, orbital pad motion - usually provides unsuitable pad profile during ex-situ conditioning near the end of pad life. Since much of the pad wear occurs by the mechanism of bladder tripe conditioning and its orbital motion without rotation, we need to implement new ex-situ conditioner which can prevent abnormal regional force on pad caused by bladder-type and also need to rotate the pad during conditioning. Another important study of ADPC is related to the orbital scratch of which source is assumed as diamond grit dropped from the strip during ex-situ conditioning. Scratch from diamond grit damaged wafer severely so usual1y scraped. Figure 1 shows the typical shape of scratch damaged from diamond. We suspected that intensive forces to the edge area of bladder type stripper accelerated the drop of Diamond grit during conditioning, so new designed Flat stripper was introduced.

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Evaluation of the fabrications and properties of ultra-thin film for memory device application (메모리소자 응용을 위한 초박막의 제작 및 특성 평가)

  • Jeong, Sang-Hyun;Choi, Haeng-Chul;Kim, Jae-Hyun;Park, Sang-Jin;Kim, Kwang-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.169-170
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    • 2006
  • In this study, ultra thin films of ferroelectric vinylidene fluoride-trifluoroethylene (VF2-TrFE) copolymer were fabricated on degenerated Si (n+, $0.002\;{\Omega}{\cdot}cm$) using by spin coating method. A 1~5 wt% diluted solution of purified vinylidene fluoride-trifluoroethylene (VF2:TrFE=70:30) in a dimethylformamide (DMF) solvent were prepared and deposited on silicon wafers at a spin rate of 2000~5000rpm for 30 seconds. After annealing in a vacuum ambient at $200^{\circ}C$ for 60 min, upper gold electrodes were deposited by vacuum evaporation for electrical measurement. X-ray diffraction results showed that the VF2-TrFE films on Si substrates had $\beta$-phase of copolymer structures. The capacitance on $n^+$-Si(100) wafer showed hysteresis behavior like a butterfly shape and this result indicates clearly that the dielectric films have ferroelectric properties. The typical measured remnant polarization (2Pr) and coercive filed (EC) values measured using a computer controlled a RT-66A standardized ferroelectric test system (Radiant Technologies) were about $0.54\;C/cm^2$ and 172 kV/cm, respectively, in an applied electric field of ${\pm}0.75\;MV/cm$.

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Fabrication of diffractive optical element for objective lens of small form factor data storage device (초소형 광정보저장기기용 웨이퍼 스케일 대물렌즈 제작을 위한 회절광학소자 성형기술 개발)

  • Bae H.;Lim J.;Jeong K.;Han J.;Yoo J.;Park N.;Kang S.
    • Proceedings of the Korean Society for Technology of Plasticity Conference
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    • 2005.09a
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    • pp.35-40
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    • 2005
  • The demand for small and high-capacity optical data storage devices has rapidly increased. The areal density of optical disk is increased using higher numerical aperture objective lens and shorter wavelength source. A wafer-scale stacked micro objective lens with a numerical aperture of 0.85 and a focal length of 0.467mm for the 405nm blue- violet laser was designed and fabricated. A diffractive optical element (DOE) was used to compensate the spherical aberration of the objective lens. Among the various fabrication methods for micro DOE, the UV-replication process is more suitable for mass-production. In this study, an 8-stepped DOE pattern as a master was fabricated by photolithography and reactive ion etching process. A flexible mold was fabricated for improving the releasing properties and shape accuracy in UV-molding process. In the replication process, the effects of exposing time and applied pressure on the replication quality were analyzed. Finally, the shapes of master, mold and molded pattern were measured by optical scanning profiler. The deviation between the master and the molded DOE was less than 0.1um. The efficiency of the molded DOE was measured by DOE efficiency measurement system which consists of laser source, sample holder, aperture and optical power meter, and the measured value was $84.5\%$.

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Off-Site Distortion and Color Compensation of Underwater Archaeological Images Photographed in the Very Turbid Yellow Sea

  • Jung, Young-Hwa;Kim, Gyuho;Yoo, Woo Sik
    • Journal of Conservation Science
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    • v.38 no.1
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    • pp.14-32
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    • 2022
  • Underwater photographing and image recording are essential for pre-excavation survey and during excavation in underwater archaeology. Unlike photographing on land, all underwater images suffer various quality degradations such as shape distortions, color shift, blur, low contrast, high noise levels and so on. Outcome is very often heavily photographing equipment and photographer dependent. Excavation schedule, weather conditions, and water conditions can put burdens on divers. Usable images are very limited compared to the efforts. In underwater archaeological study in very turbid water such as in the Yellow Sea (between mainland China and the Korean peninsula), underwater photographing is very challenging. In this study, off-site image distortion and color compensation techniques using an image processing/analysis software is investigated as an alternative image quality enhancement method. As sample images, photographs taken during the excavation of 800-year-old Taean Mado Shipwrecks in the Yellow Sea in 2008-2010 were mainly used. Significant enhancement in distortion and color compensation of archived images were obtained by simple post image processing using image processing/analysis software (PicMan) customized for given view ports, lenses and cameras with and without optical axis offsets. Post image processing is found to be very effective in distortion and color compensation of both recent and archived images from various photographing equipment models and configurations. Merits and demerit of in-situ, distortion and color compensated photographing with sophisticated equipment and conventional photographing equipment, which requires post image processing, are compared.

Formation of Sn-Cu Solder Bump by Electroplating for Flip Chip (플립칩용 Sn-Cu 전해도금 솔더 범프의 형성 연구)

  • 정석원;강경인;정재필;주운홍
    • Journal of the Microelectronics and Packaging Society
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    • v.10 no.4
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    • pp.39-46
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    • 2003
  • Sn-Cu eutectic solder bump was fabricated by electroplating for flip chip and its characteristics were studied. A Si-wafer was used as a substrate and the UBM(Under Bump Metallization) of Al(400 nm)/Cu(300 nm)/Ni(400 nm)/Au(20 nm) was coated sequentially from the substrate to the top by an electron beam evaporator. The experimental results showed that the plating ratio of the Sn-Cu increased from 0.25 to 2.7 $\mu\textrm{m}$/min with the current density of 1 to 8 A/d$\m^2$. In this range of current density the plated Sn-Cu maintains its composition nearly constant level as Sn-0.9∼1.4 wt%/Cu. The solder bump of typical mushroom shape with its stem diameter of 120 $\mu\textrm{m}$ was formed through plating at 5 A/d$\m^2$ for 2 hrs. The mushroom bump changed its shape to the spherical type of 140 $\mu\textrm{m}$ diameter by air reflow at $260^{\circ}C$. The homogeneity of chemical composition for the solder bump was examined, and Sn content in the mushroom bump appears to be uneven. However, the Sn distributed more uniformly through an air reflow.

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The Pad Recovery as a function of Diamond Shape on Diamond Disk for Metal CMP (Metal CMP 용 컨디셔너 디스크 표면에 존재하는 다이아몬드의 형상이 미치는 패드 회복력 변화)

  • Kim, Kyu-Chae;Kang, Young-Jae;Yu, Young-Sam;Park, Jin-Goo;Won, Young-Man;Oh, Kwang-Ho
    • Journal of the Microelectronics and Packaging Society
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    • v.13 no.3 s.40
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    • pp.47-51
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    • 2006
  • Recently, CMP (Chemical Mechanical Polishing) is one of very important processing in semiconductor technology because of large integration and application of design role. CMP is a planarization process of wafer surface using the chemical and mechanical reactions. One of the most important components of the CMP system is the polishing pad. During the CMP process, the pad itself becomes smoother and glazing. Therefore it is necessary to have a pad conditioning process to refresh the pad surface, to remove slurry debris and to supply the fresh slurry on the surface. A conditioning disk is used during the pad conditioning. There are diamonds on the surface of diamond disk to remove slurry debris and to polish pad surface slightly, so density, shape and size of diamond are very important factors. In this study, we characterized diamond disk with 9 kinds of sample.

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Fabrication Method of High-density and High-uniformity Solder Bump without Copper Cross-contamination in Si-LSI Laboratory (실리콘 실험실에 구리 오염을 방지 할 수 있는 고밀도/고균일의 Solder Bump 형성방법)

  • 김성진;주철원;박성수;백규하;이희태;송민규
    • Journal of the Microelectronics and Packaging Society
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    • v.7 no.4
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    • pp.23-29
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    • 2000
  • We demonstrate the fabrication method of high-density and high-quality solder bump solving a copper (Cu) cross-contamination in Si-LSI laboratory. The Cu cross-contamination is solved by separating solder-bump process by two steps. Former is via-formation process excluding Cu/Ti under ball metallurgy (UBM) layer sputtering in Si-LSI laboratory. Latter is electroplating process including Ti-adhesion and Cu-seed layers sputtering out of Si-LSI laboratory. Thick photoresist (PR) is achieved by a multiple coating method. After TiW/Al-electrode sputtering for electroplating and via formation in Si-LSI laboratory, Cu/Ti UBM layer is sputtered on sample. The Cu-seed layer on the PR is etched during Cu-electroplating with low-electroplating rate due to a difference in resistance of UBM layer between via bottom and PR. Therefore Cu-buffer layer can be electroplated selectively at the via bottom. After etching the Ti-adhesion layer on the PR, Sn/Pb solder layer with a composition of 60/40 is electroplated using a tin-lead electroplating bath with a metal stoichiometry of 60/40 (weight percent ratio). Scanning electron microscope image shows that the fabricated solder bump is high-uniformity and high-quality as well as symmetric mushroom shape. The solder bumps with even 40/60 $\mu\textrm{m}$ in diameter/pitch do not touch during electroplating and reflow procedures. The solder-bump process of high-uniformity and high-density with the Cu cross-contamination free in Si-LSI laboratory will be effective for electronic microwave application.

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MEMS Fabrication of Microchannel with Poly-Si Layer for Application to Microchip Electrophoresis (마이크로 칩 전기영동에 응용하기 위한 다결정 실리콘 층이 형성된 마이크로 채널의 MEMS 가공 제작)

  • Kim, Tae-Ha;Kim, Da-Young;Chun, Myung-Suk;Lee, Sang-Soon
    • Korean Chemical Engineering Research
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    • v.44 no.5
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    • pp.513-519
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    • 2006
  • We developed two kinds of the microchip for application to electrophoresis based on both glass and quartz employing the MEMS fabrications. The poly-Si layer deposited onto the bonding interface apart from channel regions can play a role as the optical slit cutting off the stray light in order to concentrate the UV ray, from which it is possible to improve the signal-to-noise (S/N) ratio of the detection on a chip. In the glass chip, the deposited poly-Si layer had an important function of the etch mask and provided the bonding surface properly enabling the anodic bonding. The glass wafer including more impurities than quartz one results in the higher surface roughness of the channel wall, which affects subsequently on the microflow behavior of the sample solutions. In order to solve this problem, we prepared here the mixed etchant consisting HF and $NH_4F$ solutions, by which the surface roughness was reduced. Both the shape and the dimension of each channel were observed, and the electroosmotic flow velocities were measured as 0.5 mm/s for quartz and 0.36 mm/s for glass channel by implementing the microchip electrophoresis. Applying the optical slit with poly-Si layer provides that the S/N ratio of the peak is increased as ca. 2 times for quartz chip and ca. 3 times for glass chip. The maximum UV absorbance is also enhanced with ca. 1.6 and 1.7 times, respectively.