• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2000년도 Proceedings of 5th International Joint Symposium on Microeletronics and Packaging
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• pp.57-64
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• 2000

As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology fur their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electrodes nickel, solder jetting, stud bumping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.

• 마이크로전자및패키징학회지
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• 제7권1호
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• pp.51-59
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• 2000

As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology for their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electroless nickel, solder jetting, stud humping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. Research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.

• E2M - 전기 전자와 첨단 소재
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• 제10권1호
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• pp.8-14
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• 1997

The UV/O$_{3}$ dry cleaning has been well known in removing organic molecules. The UV/O$_{3}$ dry cleaning method was performed to clean the Si wafer surfaces and contact holes contaminated by organic molecules such as residual PR. During the cleaning process, the Si surfaces were analyzed with X-ray photoelectron spectroscopy (XPS), atomic force microscope (AFM) and ellipsometer. When the UV/O$_{3}$ dry cleaning at 200'C was performed for 3 minutes, the residual photoresist was almost removed on Si wafer surfaces, but Si surfaces were oxidized. For UV/O$_{3}$ application of contact hole cleaning, the contact string were formed using the equipment of ISRC (Inter-university Semiconductor Research Center). Before Al deposition, UV/O$_{3}$ (at 200.deg. C) dry cleaning was performed for 3 minutes. After metal annealing, the specific contact resistivity was measured. Because UV/O$_{3}$ dry cleaning removed organic contaminants in contact holes, the specific contact resistivity decreased. Each contact hole size was different, but the specific contact resistivities were all much the same. Thus, it is expected that the UV/O$_{3}$ dry cleaning method will be useful method of removal of the organic contaminants at smaller contact hole cleaning.

• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 2004년도 춘계학술대회 학술발표 논문집 제14권 제1호
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• pp.149-152
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• 2004

Generally the wafer is increased by 300mm. We are desired that the wafer is prevented from pollutions of metal contaminant on surface of wafer. We have to develop new wafer cleaning process of IC Manufacturing that can reduce DI water and chemical by removal of the wafer cleaning process step. Moreover, it is difficult to control temprature and density of chemical in spite of rapidly increasing automation of system. We design smart module controller for new generation of semiconductor wet station with intelligent algorithm using data that is taken by computer simulation for optimal system.

• 한국진공학회지
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• 제6권1호
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• pp.9-19
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• 1997

본 연구에서는 실리콘 웨이퍼 표면에 존재하는 미량의 Zn, Fe, Ti 금속 오염물들이 UV-excited chlorine radical을 이용한 건식세정 방법으로 제거되는 반응과정을 찾아내고자 하였다. 실리콘 웨이퍼 상에 진공증착법으로 원형패턴이 있는 Zn, Fe, Ti 박막을 증착시켜 상온 및 $200^{\circ}C$에서 UV/$Cl_2$세정하였을 때, 염소 래디컬($Cl^*$)이 Fe, Zn, Ti와 반응하여 제거되 는 것을 반응 전후 광학현미경과 SEM을 통해 표면 형상 변화를 관찰하였고, in-line으로 연결된 XPS를 통해서 반응 후 웨이퍼 표면에 남아있는 화합물의 화학적 결합상태를 관찰 하였으며, UV/$Cl_2$ 세정 후 실리콘 기판이 손상받는 정도를 알기 위해 AFM으로 표면 거칠 기를 측정하였다. 광학현미경과 SEM의 분석 결과에 의하면 Zn와 Fe는 쉽게 제거되는 반면 염화물을 형성하기 보다는 휘발성이 적은 산화물을 형성하는 경향이 강한 Ti은 약간만 제 거되는 것을 확인하였다. XPS분석을을 통해서 이들 금속 오염물들이 chlorine radical과 반 응하여 웨이퍼 표면에 금속 염화물을 형성하고 있는 것을 확인하였고, UV/$Cl_2$세정처리를 하였을 때 실리콘 웨이퍼의 표면 거칠기가 약간 증가하는 것을 알 수 있었다. 지금까지의 결 과를 볼 때, 습식세정과 UV/$Cl_2$건식세정을 병행하면 플라즈마 및 레이저를 사용하는 다른 건식세정 방법에 비하여 보다 저온에서 실리콘 기판의 큰 손상 없이 비교적 용이하게 금속 오염물을 제거할 수 있음을 제안 하였다.

• 전자공학회논문지
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• 제50권11호
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• pp.43-49
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• 2013

실리콘 태양전지 제조에 기판으로 사용되는 156 mm 실리콘 웨이퍼의 제작 공정에 적용하기 위한 오존수 세정 메커니즘에 대하여 연구하였다. 이를 위하여 생산 공정에 있어서 제품 불량 및 성능 저하를 유발하는 웨이퍼 표면 오염원을 분석하였으며, 이를 제거하기 위한 오존 세정공정에 대하여 실험하였다. 이 기술을 적용한 결과 미세입자는 94% 이상 제거 되었으며, 잔류 유기물도 45% 이상 더 제거되는 것으로 나타났다.

• 전자공학회논문지
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• 제51권8호
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• pp.23-29
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• 2014

실리콘 태양전지 제조에 기판으로 사용되는 156 mm 실리콘 웨이퍼의 제작 공정에 있어서 제품 불량 및 성능 저하를 유발하는 웨이퍼 표면 오염원을 분석하였으며, 이를 제거하기 위한 오존수 세정에 대하여 실험하였다. 오염물질은 웨이퍼 절단 공정에서 사용되는 슬러리 및 세척액 속에 포함된 유기물과 소잉 와이어로부터 분리된 미세입자에 의해 형성되며, 오존수 세정공정을 통하여 제거할 수 있었다. 이 기술을 적용하면 태양전지용 웨이퍼를 저렴하고 효율적이며 친환경적으로 제조할 수 있다.

• 마이크로전자및패키징학회지
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• 제20권2호
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• pp.11-15
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• 2013

The wafer bonding process becomes a flexible approach to material and device integration. The bonding strength in 3-dimensional process is crucial factor in various interface bonding process such as silicon to silicon, silicon to metals such as oxides to adhesive intermediates. A measurement method of bonding strength was proposed by utilizing AFM applied CNT probe tip which indicated the relative simplicity in preparation of sample and to have merit capable to measure regardless type of films. Also, New Tool was utilized to measure of tip radius. The cleaned $SiO_2$-Si bonding strength of SPFM indicated 0.089 $J/m^2$, and the cleaning result by RCA 1($NH_4OH:H_2O:H_2O_2$) measured 0.044 $J/m^2$, indicated negligible tolerance which verified the possibility capable to measure accurate bonding strength. And it could be confirmed the effective bonding is possible through SPFM cleaning.

• 전자공학회논문지A
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• 제30A권11호
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• pp.99-104
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• 1993

We analyzed the D.I. water used in wet cleaning process of semiconductor device manufacturing both at the D.I. water plant and at the wafer cleaning bath to detect the impurity source of D.I. water contamination. This shows that the quantity of impurity is related to the resistivity of D.I. water, and we found that the cleanliness of the wafer surface processed in D.I. water bath was affected by the degree of the ionic impurity contamination. So we evaluated the cleaning effect as different method for Fe ion, having the best adsoptivity on wafer surface. Moreover the temperature effect of the D.I. water is investigated in case of anion in order to remove the chemical residue after wet process. In addition to the control of D.I. water resistivity, chemical analysis of impurity control in D.I. water should be included and a suitable cleaning an drinsing method needs to be investigated for a high yielding semiconductor device.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제52권12호
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• pp.579-585
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• 2003

Recently the utilization of the ozone dissolved de-ionized water(DI-O3 water) in semiconductor wet cleaning process to replace the conventional RCA methods has been studied. In this paper, we propose the water-electrode type ozone generator which has the ozone gas characteristics of the high concentration and high purity to produce the high concentration DI-O3 water for the silicon wafer surface cleaning process. The ozone generator has the dual dielectric tube structure of silent discharge type and the water is both used to electrode and cooling water. We investigate the performance of the proposed ozone generator which has the design goal of the concentration of 7[wt%] and ozone generation quantity of 6[g/hr] at flow rate of 1[$\ell$/min). The experiment results show that the water electrode type ozone generator has the characteristics of 8.48[wt%] of concentration, 8.08[g/hr] of generation quantity and 76.2[g/kWh] of yield and it's possible to use the proposed ozone generator for the DI-O3 water cleaning process of silicon wafer surface.