• 제목/요약/키워드: Wafer Cleaning

검색결과 172건 처리시간 0.022초

실리콘 웨이퍼 직접접합에서 내인성 Bubble의 거동에 관한 연구 (The Behavior of Intrinsic Bubbles in Silicon Wafer Direct Bonding)

  • 문도민;정해도
    • 한국정밀공학회지
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    • 제16권3호통권96호
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    • pp.78-83
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    • 1999
  • The bonding interface is dependent on the properties of surfaces prior to SDB(silicon wafer direct bonding). In this paper, we prepared silicon surfaces in several chemical solutions, and annealed bonding wafers which were combined with thermally oxidized wafers and bare silicon wafers in the temperature range of $600{\times}1000^{\circ}C$. After bonding, the bonding interface is investigated by an infrared(IR) topography system which uses the penetrability of infrared through silicon wafer. Using this procedure, we observed intrinsic bubbles at elevated temperatures. So, we verified that these bubbles are related to cleaning and drying conditions, and the interface oxides on silicon wafer reduce the formation of intrinsic bubbles.

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실리콘 웨이퍼 연삭의 형상 시뮬레이션 (Profile Simulation in Mono-crystalline Silicon Wafer Grinding)

  • 김상철;이상직;정해도;최헌종;이석우
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2003년도 춘계학술대회 논문집
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    • pp.98-101
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    • 2003
  • As the ultra precision grinding can be applied to wafering process by the refinement of the abrasive. the development of high stiffness equipment and grinding skill, the conventional wafering process which consists of lapping, etching, 1st, 2nd and 3rd polishing could be exchanged to the new process which consists of precision surface grinding, final polishing and post cleaning. Especially, the ultra precision grinding of wafer improves the flatness of wafer and the efficiency of production. Futhermore, it has been not only used in bare wafer grinding, but also applied to wafer back grinding and SOI wafer grinding. This paper focused on the flatness of the ground wafer. Generally, the ground wafer has concave profile because of the difference of wheel path density, grinding temperature and elastic deformation of the equiptment. Tilting mathod is applied to avoid such non-uniform material removes. So, in this paper, the geometric analysis on grinding process is carried out, and then, we can predict the profile of th ground wafer by using profile simulation.

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실리콘기판과 불소부식에 표면에서 금속불순물의 제거 (Removal of Metallic Impurity at Interface of Silicon Wafer and Fluorine Etchant)

  • 곽광수;연영흠;최성옥;정노희;남기대
    • 한국응용과학기술학회지
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    • 제16권1호
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    • pp.33-40
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    • 1999
  • We used Cu as a representative of metals to be directly adsorbed on the bare Si surface and studied its removal DHF, DHF-$H_2O_2$ and BHF solution. It has been found that Cu ion in DHF adheres on every Si wafer surface that we used in our study (n, p, n+, p+) especially on the n+-Si surface. The DHF-$H_2O_2$ solution is found to be effective in removing metals featuring high electronegativity such as Cu from the p-Si and n-Si wafers. Even when the DHF-$H_2O_2$ solution has Cu ions at the concentration of 1ppm, the solution is found effective in cleaning the wafer. In the case the n+-Si and p+-Si wafers, however, their surfaces get contaminated with Cu When Cu ion of 10ppb remains in the DHF-$H_2O_2$ solution. When BHF is used, Cu in BHF is more likely to contaminate the n+-Si wafer. It is also revealed that the surfactant added to BHF improve wettability onto p-Si, n-Si and p+-Si wafer surface. This effect of the surfactant, however, is not observed on the n+-Si wafer and is increased when it is immersed in the DHF-$H_2O_2$ solution for 10min. The rate of the metallic contamination on the n+-Si wafer is found to be much higher than on the other Si wafers. In order to suppress the metallic contamination on every type of Si surface below 1010atoms/cm2, the metallic concentration in ultra pure water and high-purity DHF which is employed at the final stage of the cleaning process must be lowered below the part per trillion level. The DHF-$H_2O_2$ solution, however, degrades surface roughness on the substrate with the n+ and p+ surfaces. In order to remove metallic impurities on these surfaces, there is no choice at present but to use the $NH_4OH-H_2O_2-H_2O$ and $HCl-H_2O_2-H_2O$ cleaning.

불산-오존-희석 암모니아수 세정에 의한 실리콘 웨이퍼 표면의 미세입자 제거 (Particle Removal on Silicon Wafer Surface by Ozone-HF-NH4OH Sequence)

  • 이건호;배소익
    • Korean Chemical Engineering Research
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    • 제45권2호
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    • pp.203-207
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    • 2007
  • 불산과 오존 세정 시 실리콘 웨이퍼 표면의 미세입자를 효과적으로 제거할 수 있는 세정 방법에 대하여 연구하였다. 불산의 농도가 0.3 vol% 이상이 되어야 미세입자가 제거 되었으며, 초음파가 인가된 오존수를 사용 시 제거 효율은 증가되었다. 오존과 불산 세정 단계 이후에 추가로 극미량의(0.01 vol%) 희석 암모니아수 세정을 하면 미세입자가 99%이상 제거됨을 확인하였다. 이는 암모니아수에 의한 웨이퍼 표면의 미세 에칭 효과와 알칼리 영역에서의 재흡착 방지 효과가 동시에 작용함에 기인된다고 보인다. 한편, 불산-오존-희석 암모니아수 세정은 통상의 SC-1 세정과 비교할 때 표면 미세 거칠기가 개선되는 경향을 보였다. 불산-오존-희석 암모니아수 세정은 상온에서도 미세입자를 효과적으로 제거할 수 있는 세정 방법으로, 고온 공정 및 과다한 화학액을 사용하는 기존 습식세정의 대안으로서 기대된다.

Bonded SOI 웨이퍼 제조를 위한 기초연구 (A Fundamental Study of the Bonded SOI Water Manufacturing)

  • 문도민;강성건;정해도
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 1997년도 춘계학술대회 논문집
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    • pp.921-926
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    • 1997
  • SOI(Silicon On lnsulator) technology is many advantages in the gabrication of MOS(Metal-Oxide Semiconductor) and CMOS(Complementary MOS) structures. These include high speed, lower dynamic power consumption,greater packing density, increased radiation tolearence et al. In smiple form of bonded SOL wafer manufacturing, creation of a bonded SOI structure involves oxidizing at least one of the mirror polished silicon surfaces, cleaning the oxidized surface and the surface of the layer to which it will be bonded,bringing the two cleanded surfaces together in close physical proximity, allowing the subsequent room temperature bonding to proceed to completion, and than following this room temperature joining with some form of heat treatment step,and device wafer is thinned to the target thickness. This paper has been performed to investigate the possibility of the bonded SOI wafer manufacturing Especially, we focused on the bonding quality and thinning method. Finally,we achieved the bonded SOI wafer that Si layer thickness is below 3 .mu. m and average roughness is below 5.angs.

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SiO$_2$ 박막을 이용한 SOI 직접접합공정 및 특성 (Processing and Characterization of a Direct Bonded SOI using SiO$_2$ Thin Film)

  • 유연혁;최두진
    • 한국세라믹학회지
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    • 제36권8호
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    • pp.863-870
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    • 1999
  • SOI(silicon on insulafor) was fabricated through the direct bonding using (100) Si wafer and 4$^{\circ}$off (100) Si wafer to investigate the stacking faults in silicon at the Si/SiO2 oxidized and bonded interface. The treatment time of wafer surface using MSC-1 solution was varied in order to observe the effect of cleaning on bonding characteristics. As the MSC-1 treating time increased surface hydrophilicity was saturated and surface microroughness increased. A comparison of surface hydrophilicity and microroughness with MSC-1 treating time indicates that optimum surface modified condition for time was immersed in MSC-1 for 2 min. The SOI structure directly bonded using (100) Si wafer and 4$^{\circ}$off (100) Si wafer at the room temperature were annealed at 110$0^{\circ}C$ for 30 min. Then the stacking faults at the bonding and oxidation interface were examined after the debonding. The results show that there were anomalies in the gettering of the stacking faults at the bonded region.

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Wafer 반송용 End-Effector의 설계 및 파지력 제어에 관한 연구

  • 권오진;최성주;이우영;이강원
    • 한국반도체및디스플레이장비학회:학술대회논문집
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    • 한국반도체및디스플레이장비학회 2003년도 춘계학술대회 발표 논문집
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    • pp.80-87
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    • 2003
  • On this study, an End-Effector for the 300mm wafer transfer robot System is newly suggested. It is a mechanical type with $180^{\circ}$ rotating ranges and is composed of 3-point arms, two plate springs and single-axis DC motor. It is controlled by microchip for the DC motor control. To design, relationships on the gripping force and the wafer deformation is analyzed by FEM analysis. Criterion on gripping force of a suggested End-Effector is confirmed as $255 ~ 274g_f$ from experimental results. From experimented results on repeatable position accuracy, gripping force and gripping cycle times in a wafer cleaning system, we confirmed that the suggested End-Effector is well satisfied on the required performance for 300mm wafer transfer robot system.

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반도체 세정 공정 평가를 위한 나노입자 안착 시스템 개발

  • 남경탁;김호중;김영길;김태성
    • 한국반도체및디스플레이장비학회:학술대회논문집
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    • 한국반도체및디스플레이장비학회 2007년도 춘계학술대회
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    • pp.128-131
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    • 2007
  • As the minimum feature size decrease, control of contamination by nanoparticles is getting more attention in semiconductor process. Cleaning technology which removes nanoparticles is essential to increase yield. A reference wafer on which particles with known size and number are deposited is needed to evaluate the cleaning process. We simulated particle trajectories in the chamber by using FLUENT. Charged monodisperse particles are generated using scanning mobility particle sizer (SMPS) and deposited on the wafer by electrostatic force. The experimental results agreed with the simulation results well. We calculate the particles loss in pipe flow theoretically and compare with the experimental results.

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