• Corrosion Science and Technology
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• v.9 no.6
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• pp.276-280
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• 2010

Copper(Cu) as an interconnecting metal layer can replace aluminum (Al) in IC fabrication since Cu has low electrical resistivity, showing high immunity to electromigration compared to Al. However, it is very difficult for copper to be patterned by the dry etching processes. The chemical mechanical polishing (CMP) process has been introduced and widely used as the mainstream patterning technique for Cu in the fabrication of deep submicron integrated circuits in light of its capability to reduce surface roughness. But this process leaves a large amount of residues on the wafer surface, which must be removed by the post-CMP cleaning processes. Copper corrosion is one of the critical issues for the copper metallization process. Thus, in order to understand the copper corrosion problems in post-CMP cleaning solutions and study the effects of DC biases and post-CMP cleaning solution concentrations on the Cu film, a constant voltage was supplied at various concentrations, and then the output currents were measured and recorded with time. Most of the cases, the current was steadily decreased (i.e. resistance was increased by the oxidation). In the lowest concentration case only, the current was steadily increased with the scarce fluctuations. The higher the constant supplied DC voltage values, the higher the initial output current and the saturated current values. However the time to be taken for it to be saturated was almost the same for all the DC supplied voltage values. It was indicated that the oxide formation was not dependent on the supplied voltage values and 1 V was more than enough to form the oxide. With applied voltages lower than 3 V combined with any concentration, the perforation through the oxide film rarely took place due to the insufficient driving force (voltage) and the copper oxidation ceased. However, with the voltage higher than 3 V, the copper ions were started to diffuse out through the oxide film and thus made pores to be formed on the oxide surface, causing the current to increase and a part of the exposed copper film inside the pores gets back to be oxidized and the rest of it was remained without any further oxidation, causing the current back to decrease a little bit. With increasing the applied DC bias value, the shorter time to be taken for copper ions to be diffused out through the copper oxide film. From the discussions above, it could be concluded that the oxide film was formed and grown by the copper ion diffusion first and then the reaction with any oxidant in the post-CMP cleaning solution.

• Solar Energy
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• v.12 no.2
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• pp.62-78
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• 1992

The solar cells of $ITO_{(n)}/Si_{(p)}$, which are ITO thin films deposited and heated on Si wafer 190[$^{\circ}C$], were fabricated by two source vaccum deposition method, and their electrical properties were investigated. Its maximum output is obtained when the com- position of the thin film consist of indium oxide 91[mole %] and thin oxide 9[mole %]. The cell characteristics can be improved by annealing but are deteriorated at temperature above 600[$^{\circ}C$] for longer than 15[min]. Also, we investigated the spectral response with short circuit current of the cells and found that the increasing of the annealing caused the peak shifted to the long wavelength region. And by experiment of the X-ray diffraction, it is shown to grow the grains of the thin film with increasment of annealing temperature. The test results from the $ITO_{(n)}/Si_{(p)}$ solar cell are as follows. short circuit current : Isc= 31 $[mW/cm^2]$ open circuit voltage : Voc= 460[mV] fill factor : FF=0.71 conversion efficiency : ${\eta}$=11[%]. under the solar energy illumination of $100[mW/cm^2]$.

• Journal of the Korean Vacuum Society
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• v.17 no.6
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• pp.560-565
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• 2008

$(Pb_{0.98}La_{0.08})(Zr_{0.65}Ti_{0.35})O_3$ (PLZT) thin films with $TiO_2$ buffer layers were deposited on Pt/Ti/$SiO_2$/Si substrates by an R.F. magnetron sputtering method in order to improve the ferroelectric characteristics of the films. And the ferroelectric properties and crystallinities of the PLZT thin films were investigated in terms of the effects of the post annealing temperatures of $TiO_2$ buffer layers between a platinum bottom electrode and PLZT thin film. The ferroelectric properties of the PLZT thin films improved as increasing of the post annealing temperatures of $TiO_2$ layers, thereby reaching their maximum at $600^{\circ}C$.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.214-214
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• 1999

다이아몬드를 반도체용 열방산용기판 등으로 사용하기 위해서는 수백 $\mu\textrm{m}$ 두께의 대면적 웨이퍼가 요구된다. 이를 위해서 DC are jet CVD, MW PACVD, DC PACVD 등이 개발되어, 현재 4"에서 8"까지의 많은 문제를 일으키고 있다. 본 연구에서는 multi-cathode DC PACVD법에 의한 4" 다이아몬드 웨이퍼의 합성과 합성된 막의 특성변화에 대한 연구를 수행하였다. 또한, 웨이퍼의 휨과 crack 발생거동과 대한 고찰을 통래 휨과 crack이 없는 웨이퍼의 제작방법을 고안하였다. 사용된 음극의 수는 일곱 개이며, 투입된 power는 각 음극 당 약 2.5kW(4.1 A-600V)이었다. 사용된 기판의 크기는 직경 4"이었다. 합성압력은 100Torr, 가스유량은 150sccm, 증착온도는 125$0^{\circ}C$~131$0^{\circ}C$, 수소가스네 메탄조성은 5%~8%이었다. 합성 중 막에 인가되는 응력은 합성 중 증착온도의 변화에 의해 제어하였다. 막의 결정도는 Raman spectroscopy 및 열전도도를 측정을 통해 분석하였다. 성장속도 및 다이아몬드 peak의 반가폭은 메탄조성 증가(5%~8%)에 따라 증가하여 각각 6.6~10.5$\mu\textrm{m}$/h 및 3.8~5.2 cm-1의 분포를 보였다. 6%CH4 및 7%CH4에서 합성된 웨이퍼에서 측정된 막의 열전도도는 11W/cmK~13W/cmK 정도로 높게 나타났다. 막두께의 uniformity는 최대 3.5%로 매우 균일하였다. 막에 인가되는 응력의 제어로 직경 4"k 합성면적에서 두께 1mm 이상의 균열 및 휨이 없는 다이아몬드 자유막 웨이퍼를 합성할 수 있었다.다이아몬드 자유막 웨이퍼를 합성할 수 있었다.active ion에 의해 sputtering 이 된다. 이때 plasma 처리기의 polymer 기판 후면에 magnet를 설치하여 높은 ionization을 발생시켜 처리 효과를 한층 높여 주었다. 이 plasma 처리는 표면 청정화, 표면 etching 이 동시에 행하는 것과 함께 장시간 처리에 의해 표면에서는 미세한 과, C=C기, -C-O-의 극성기의 도입에 의한 표면 개량이 된다는 것을 관찰할 수 있다. OPP polymer 표면을 Ar 100%로 plasma 처리한 경우 C-O, C=O 등의 carbonyl가 발생됨을 알 수 있었다. C-O, C=O 등의 carbynyl polor group이 도입됨에 따라 sputter된 Al의 접착력이 향상됨을 알 수 있으며, TEM 관찰 결과 grain size도 상당히 작아짐을 알 수 있었다.onte-Carlo 방법으로 처리하였다. 정지기장해석의 경우 상용 S/W인 Vector Fields를 사용하였다. 이를 통해 sputter 내 플라즈마 특성, target으로 입사하는 이온에너지 및 각 분포, 이들이 target erosion 형상에 미치는 영향을 살펴보았다. 또한 이들 결과로부터 간단한 sputtering 모델을 사용하여 target으로부터 sputter된 입자들이 substrate에 부착되는 현상을 Monte-Carlo 방법으로 추적하여 성막특성도 살펴보았다.다.다양한 기능을 가진 신소재 제조에 있다. 또한 경제적인 측면에서도 고부가 가치의 제품 개발에 따른 새로운 수요 창출과 수익률 향상, 기존의 기능성 안료를 나노(nano)화하여 나노 입자를 제조, 기존의 기능성 안료에 대한 비용 절감 효과등을 유도 할 수 있다. 역시 기술적인 측면에서도 특수소재 개발에 있어 최적의 나노 입자 제어기술 개발 및 나노입자를 기능성 소재로 사용하여 새로운 제품의 제조와 고압 기상

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.7
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• pp.831-841
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• 2010

The conventional vertical probe has the thin and long signal path that makes transfer characteristic of probe worse because of the S-shaped structure. So we propose the new vertical probe structure that has branch springs in the S-shaped probe. It makes closed loop when the probe mechanically connects to the electrode on a wafer. We fabricated the proposed vertical probe and measured the transfer characteristic and mechanical properties. Compared to the conventional S-shaped vertical probe, the proposed probe has the overdrive that is 1.2 times larger and the contact force that is 2.5 times larger. And we got the improved transfer characteristic by 1.4 dB in $0{\sim}10$ GHz. Also we developed the simulation model of the probe card by using full-wave simulator and the simulation result is correlated with measurement one. As a result of this simulation model, the cantilever probe and PCB have the worst transfer characteristic in the probe card.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.4
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• pp.1-7
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• 1999

We developed Fabrication process of embedded passive components in MCM-D substrate. The proposed MCM-D substrate is based on Cu/photosensitive BCB multilayer. The substrate used is Si wafer and Ti/cu metallization is used to form the interconnect layer. Interconnect layers are formed with 1000$\AA$ Ti/3000$\AA$ Cu by sputtering method and 3$\mu\textrm{m}$ Cu by electrical plating method. In order to form the vias in photosensitive BCB layer, the process of BCB and plasma etch using $C_2F_6$ gas were evaluated. The MCM-D substrate is composed of 5 dielectric layers and 4 interconnect layers. Embedded resistors are made with NiCr and implemented on the $2^{nd}$ dielectric layer. The sheet resistance of NiCr is controlled to be about 21 $\Omega$/sq at the thickness of 600$\AA$. The multi-turn sprial inductors are designed in coplanar fashion on the $4^{th}$ interconnect layer with an underpass from the center to outside using the lower $3^{rd}$ interconnect layer. Capacitors are designed and realized between $1^{st}$ interconnect layer and $2^{nd}$ interconnect layer. An important issue in capacitor is the accurate determination of the dielectric thickness. We use the 900$\AA$ thickness of PECVD silicon nitride film as dielectric. Capacitance per unit area is about 88nF/$\textrm {cm}^2$at the thickness of 900$\AA$. The advantage of this integration process is the compatibility with the conventional semiconductor process due to low temperature PECVD silicon nitride process and thermal evaporation NiCr process.

• Journal of the Korean Society of Safety
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• v.31 no.3
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• pp.42-46
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• 2016

In LCD Display or semiconductor manufacturing processes, the anti-static technology of glass substrates and wafers becomes one of the most difficult issues which influence the yield of the semiconductor manufacturing. In order to overcome the problems of wafer surface contamination various issues such as ionization in decompressed vacuum and inactive gas(i.e. $N_2$ gas, Ar gas, etc.) environment should be considered. Soft X ray radiation is adequate in air and $O_2$ gas at atmospheric pressure while UV radiation is effective in $N_2$ gas Ar gas and at reduced pressure. At this point of view, the "vacuum ultraviolet ray ionization" is one of the most suitable methods for static elimination. The vacuum ultraviolet can be categorized according to a short wavelength whose value is from 100nm to 200nm. this is also called as an Extreme Ultraviolet. Most of these vacuum ultraviolet is absorbed in various substances including the air in the atmosphere. It is absorbed substances become to transit or expose the electrons, then the ionization is initially activated. In this study, static eliminator based on the vacuum ultraviolet ray under the above mentioned environment was tested and the results show how the ionization performance based on vacuum ultraviolet ray can be optimized. These vacuum ultraviolet ray performs better in extreme atmosphere than an ordinary atmospheric environment. Neutralization capability, therefore, shows its maximum value at $10^{-1}{\sim}10^{-3}$ Torr pressure level, and than starts degrading as pressure is gradually reduced. Neutralization capability at this peak point is higher than that at reduced pressure about $10^4$ times on the atmospheric pressure and by about $10^3$ times on the inactive gas. The introductions of these technology make it possible to perfectly overcome problems caused by static electricity and to manufacture ULSI devices and LCD with high reliability.

• Journal of Sensor Science and Technology
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• v.8 no.3
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• pp.265-273
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• 1999

Various oxide films are commonly used as a sacrificial layer or etch mask in the fabrication of microelectromechanical systems (MEMS). Large residual strain of these oxide films causes the wafer to bow, which can have detrimental effects on photolithography and other ensuing processes. This paper investigates the residual strain of tetraethoxysilane (TEOS), low temperature oxide (LTO), 7 wt% and 10 wt% phosphosilicate glass (PSG). Euler beams and a bent-beam strain sensor are used to measure the residual strain. A poly silicon layer is used as the sacrificial layer, which is selectively etched away by $XeF_2$. First, the residual strain of as-deposited films is measured, which is quite large. The residual strain of the films is also measured after annealing them not only at $500^{\circ}C$, $600^{\circ}C$, $700^{\circ}$ and $800^{\circ}C$ in $N_2$ environment for 1 hour but also at the conditions for depositing a $2\;{\mu}m$ thick polysilicon at $585^{\circ}C$ and $625^{\circ}C$. Our results show that the 7 wt% PSG is best suited as the sacrificial layer for $2\;{\mu}$ thick polysilicon processes.

• Journal of Sensor Science and Technology
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• v.6 no.5
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• pp.346-355
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• 1997

In this paper, the analyses of the stress disturibution and frequency characteristics of silicon microstructures for an accelerometer were performed using the general purpose finite element simulation program, ANSYS. From the analyses, we determined the parameter values of a new 6-beam piezoresistive accelerometer applicable to the accelerometer's specification in airbag system of automobile. Then, the mass paddle radius, beam length, beam width, and beam thickness of the designed accelerometer were$500{\mu}m$, $350{\mu}m$, $100{\mu}m$, and $5{\mu}m$, respectively and two different seismic masses with 0.4 mg and 0.8 mg were defined on the same sensor structure. The designed 6- beam accelerometers were fabricated on the selectively diffused (111)-oriented $n/n^{+}/n$ silicon substrates and the characteristics of the fabricated accelerometers were investigated. Then, we used a micromachining technique using porous silicon etching method for the formation of the micromechanical structure of the accelerometer.

• Journal of Sensor Science and Technology
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• v.6 no.5
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• pp.407-413
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• 1997

The crystallized CuPc(copper phthalocyanine) film on a p-type <100> Si substrate is prepared at the substrate temperature of $300^{\circ}C$ by thermal evaporation. X -ray diffraction analysis showed the CuPc film to have a-axis oriented structure. For the measurement of photovoltaic characteristics of the CuPc/Si film and the Si substrate, a transverse current-voltage (I-V) curve is observed. In the dark, the Au/Si junction is shown to be ohmic contact. However, under illumination, a photovoltaic effect is not observed. The I-V curve in the dark indicates that the CuPc film on Si may form an ohmic contact. Since the CuPc film is a p-type semiconductor, the CuPc/p-Si junction has no barrier at the interface. Under illumination, the CuPc/Si junction shows a large photocurrent comparing with that of the wafer. The result indicates that the CuPc layer plays an important role in the photocarrier generation under red illumination (600 nm). The CuPc/Si film shows the photo voltaic characteristics with a short-circuit photocurrent ($J_{sc}$) of $4.29\;mA/cm^{2}$ and an open-circuit voltage ($V_{oc}$) of 12 mA.