• Journal of Power Electronics
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• v.10 no.2
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• pp.155-164
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• 2010

This paper presents a voltage control algorithm for a hybrid multilevel inverter based on a staged-perception of the inverter voltage vector diagram. The algorithm is applied to control a three-stage eighteen-level hybrid inverter, which has been designed with a maximum number of symmetrical levels. The inverter has a two-level main stage built using a conventional six-switch inverter and medium- and low- voltage three-level stages constructed using cascaded H-bridge cells. The distinctive feature of the proposed algorithm is its ability to avoid the undesirable high switching frequency for high- and medium- voltage stages despite the fact that the inverter's dc sources voltages are selected to maximize the number of levels by state redundancy elimination. The high- and medium- voltage stages switching algorithms have been developed to assure fundamental switching frequency operation of the high voltage stage and not more than few times this frequency for the medium voltage stage. The low voltage stage is controlled using a SVPWM to achieve the reference voltage vector exactly and to set the order of the dominant harmonics. The inverter has been constructed and the control algorithm has been implemented. Test results show that the proposed algorithm achieves the desired features and all of the major hypotheses have been verified.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1735-1742
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• 2016

This paper proposes an interleaved five-level boost converter based on a switched-capacitor network. The operating principle of the converter under the CCM mode is analyzed. A high voltage gain, low component stress, small input current ripple, and self-balancing function for the capacitor voltages in the switched-capacitor networks are achieved. In addition, a three-loop control strategy including an outer voltage loop, an inner current loop and a voltage-balance loop has been researched to achieve good performances and voltage-balance effect. An experimental study has been done to verify the correctness and feasibility of the proposed converter and control strategy.

• Journal of Electrical Engineering and Technology
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• v.8 no.3
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• pp.544-558
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• 2013

This paper proposes a simplified and efficient control scheme for Unified Power Quality Conditioner (UPQC) based on three-level (NPC) inverter capable to mitigate source current harmonics and compensate all voltage disturbances perturbations such us, voltage sags, swells, unbalances and harmonics. The UPQC is designed by the integration of series and shunt active filters (AFs) sharing a common dc bus capacitor. The dc voltage is maintained constant using proportional integral voltage controller. The shunt and series AF are designed using a three-phase three-level (NPC) inverter. The synchronous reference frame (SRF) theory is used to get the reference signals for shunt and the power reactive theory (PQ) for a series APFs. The reference signals for the shunt and series APF are derived from the control algorithm and sensed signals are injected in tow controllers to generate switching signals for series and shunt APFs. The performance of proposed UPQC system is evaluated in terms of power factor correction and mitigation of voltage, current harmonics and all voltage disturbances compensation in three-phase, three-wire power system using MATLAB-Simulink software and SimPowerSystem Toolbox. The simulation results demonstrate that the proposed UPQC system can improve the power quality at the common connection point of the non-linear load.

• Journal of Power Electronics
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• v.12 no.2
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• pp.344-356
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• 2012

In recent years, multilevel technology has become an effective and practical solution in the field of moderate and high voltage applications. This paper discusses an APF with a three-level NPC inverter. Obviously, the application of such converter to APFs is hindered by the problem of the voltage unbalance of DC capacitors, which leads to system instability. This paper comprehensively analyzes the theoretical limitations of the neutral-point voltage balancing problem for tracking different harmonic currents utilizing current switching functions from the space vector PWM (SVPWM) point of view. The fluctuation of the neutral point caused by the load currents of certain order harmonic frequency is reported and quantified. Furthermore, this paper presents a close-loop digital control algorithm of the DC voltage for this APF. A PI controller regulates the DC voltage in the outer-loop controller. In the current-loop controller, this paper proposes a simple neutral-point voltage control method. The neutral-point voltage imbalance is restrained by selecting small vectors that will move the neutral-point voltage in the direction opposite the direction of the unbalance. The experiment results illustrate that the performance of the proposed approach is satisfactory.

• Proceedings of the KIPE Conference
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• 2017.11a
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• pp.95-96
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• 2017

A three-level inverter is widely used thanks to its excellent performances, but the voltage may fluctuate at the neutral point of the split DC-Link. Neutral point voltage fluctuations cause inverter performance degradation and switching element damage, so the neutral point voltage control is essential. However, the neutral point control can be also limited by modulation index and power factor. This paper analyzes the limitation of the neutral point voltage control due to the limitation of zero-sequence voltage, and suggests a method to determine the region where the PWM has to be changed for a better neutral point control.

• Journal of Electrical Engineering and Technology
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• v.13 no.6
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• pp.2335-2343
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• 2018

This paper proposes an optimal damping control algorithm of the DTI (Direct Two-level Inverter) to miniaturize and reduce the weight of auxiliary power supply for railway vehicles. The conventional auxiliary power supply for railway vehicles uses a DC-DC converter to maintain the inverter input power from the line voltage smoothly. The proposed topology does not use a DC-DC converter for reducing of manufacturing and maintenance costs. It also proposes a DTI topology removed damping resistors that generate ground signal noise in a certain period. At this time, a resonance phenomenon of DC-link voltage occurs due to variation of the inductive load, and a method of controlling the resonance phenomenon of DC-link voltage is required. In order to suppress the resonance phenomenon of the DC-link voltage, at a point before resonance occurs, this paper introduces an algorithm to suppress the resonance phenomenon of DC-link voltage by compensating the resonance component of the q axis voltage of the synchronous reference frame. The proposed algorithm verifies the effect through simulation and experiment.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2162-2172
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• 2016

This paper presents a Direct Torque Control (DTC) strategy for the five-phase induction motor driven by a three-level five-phase inverter in order to improve the performance of the five-phase induction motor. In the proposed DTC technique, only 22 voltage vectors out of 243 available voltage vectors in a three-level five-phase inverter are selected and are divided in 10 sectors each with a width of $36^{\circ}$. The four different DTC combinations (DTC-I, II, III and IV) for a three-level five-phase induction motor drive are investigated for improving the performance of five-phase induction motor. All four of the DTC strategies utilize a combination of the same large and zero voltage vectors, but with different medium voltage vectors. Out of these four techniques, DTC-II gives the best performance when compared to the others. This DTC-II technique is analyzed in detail for improvements in the performance of five-phase induction motor in terms of torque ripple, x-y stator flux and Total Harmonics Distortion (THD) of the stator phase current when compared to its two-level counterparts. To verify the effectiveness of the proposed three-level five-phase DTC control strategy, a DSP based experimental system is build. Simulation and experimental results are provided in order to validate the proposed DTC technique.

• Journal of Electrical Engineering and Technology
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• v.12 no.6
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• pp.2227-2236
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• 2017

In order to solve the neutral-point voltage fluctuation problem of three-phase three-level T-type inverters (TPTLTIs), the unbalance characteristics of capacitor voltages under different switching states and the mechanism of neutral-point voltage fluctuation are revealed. Based on the mathematical model of a TPTLTI, a feed-forward voltage balancing control strategy of DC-link capacitor voltages error is proposed. The strategy generates a DC bias voltage using a capacitor voltage loop with a proportional integral (PI) controller. The proposed strategy can suppress the neutral-point voltage fluctuation effectively and improve the quality of output currents. The correctness of the theoretical analysis is verified through simulations. An experimental prototype of a TPTLTI based on Digital Signal Processor (DSP) is built. The feasibility and effectiveness of the proposed strategy is verified through experiment. The results from simulations and experiment match very well.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.4
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• pp.705-715
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• 2007

Recently, the interest on power quality has been hot issue because the equipments cause voltage disturbance and have become more sensitive to the voltage disturbance. Additionally, the reseach on power electronic equipments applying to the high power has been increased. This paper deals with Line-Interactive Dynamic Voltage Restorer(LIDVR) system using 7-Level H-Bridge inverter, which is one of the solutions to compensate the voltage disturbance and to increase the power of equipments. The LIDVR has the following advantages comparing to the DVR with the series injection transformer. It has the power factor near to unity under the condition of normal source voltage, can compensate the harmonic current of the load and the instant interruption, and has the fast response. First, the construction, the operation mode and algebraic modeling of LIDVR are reviewed. And then the voltage control algorithm is proposed to get the sinusoidal load voltage with constant amplitude. Finally, simulation and experiment results verify the proposed LIDVR system.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.4
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• pp.320-326
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• 2014

In this paper, the new smart dimming algorithm which is mixed with PWM and PAM control method is proposed for reducing the power consumption of LED TV Backlight. The proposed technique is using the curve characteristics of LED forward voltage and current which is proportionally changing LED forward voltage as changing LED forward current. Therefore, each PWM and PAM control method has different LED forward voltage and current in the same brightness condition. The PWM control method adjusts the brightness of LED TV Backlight by only varying the duty ratio of PWM and constantly sustaining the amplitude of LED forward current and voltage. So, the level of LED forward current and voltage in the PWM control method is relatively high and constant regardless of duty ratio of PWM. On the other hand, the PAM control method adjusts the brightness of LED TV Backlight by directly varying the level of LED forward current. So, the level of LED forward current and voltage in the PAM control method is lowered according to the brightness level. For the above-mentioned reason, the PAM control method has the advantage of reducing the total power consumption of LED TV Backlight at the brightness condition of below 100%, compared with PWM control method. By implementing this characteristic to LED driver circuit with control algorithm in MCU, the power consumption of LED TV Backlight can expect to be reduced. The effectiveness of the proposed method, new smart dimming algorithm, CPWAM(=Conditional Pulse Width Amplitude Modulation), has been verified by experimental results.