• 전력전자학회논문지
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• 제8권6호
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• pp.561-568
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• 2003

PWM 인버터의 출력전압을 제어하는 방식에는 2가지 제어기법이 있다. 첫 번째 방법은 전류제어기를 사용하여 출력전압을 제어하는 이중 제어루프를 갖는 제어방식이며, 두 번째 방법은 단일루프만으로서 출력전압을 제어하는 제어방식이다. 일반적으로 3상 PWM 인버터의 제어기는 각상 제어 PI제어기, 2상 정지좌표계 PI제어기, 동기 좌표계 PI제어기로 구성되며, 각상제어 PI제어기를 이용하여 3상의 독립된 출력측 전압 및 전류를 제어하도록 구성된다. 단일루프 전압제어기는 높은 출력 임피던스의 경우 이중제어루프 도다 더 낮은 성능을 나타내기만, 낮은 출력임피던스의 경우에는 또는 부하범위에서 좋은 제어성능을 나타낸다. 또한 시뮬레이션과 실험을 통하여 이를 검증하였다.

• International Journal of Control, Automation, and Systems
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• 제5권2호
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• pp.161-169
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• 2007

The PLL equivalent augmented system incorporated with state feedback is proposed in this paper. The optimal value of filter time constant of loop filter in the phase-locked loop control system and the optimal state feedback gain designed by using linear quadratic regulator approach are derived. This approach allows the PLL control system to employ the large value of the phase-frequency gain $K_d$ and voltage control oscillator gain $K_o$. In designing, the structure of phase-locked loop control system will be rearranged to be a phase-locked loop equivalent augmented system by including the structure of loop filter into the process and by considering the voltage control oscillator as an additional integrator. The designed controller consisting of state feedback gain matrix K and integral gain $k_1$ is an optimal controller. The integral gain $k_1$ related to weighting matrices q and R will be an optimal value for assigning the filter time constant of loop filter. The experimental results in controlling the second-order lag pressure process using two types of loop filters show that the system response is fast without steady-state error, the output disturbance effect rejection is fast and the tracking to step changes is good.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.206-211
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• 2005

The hearing aids specific operational amplifier described in this paper is a single-supply, low voltage CMOS amplifier. It works on 1.3V single-supply and gets a gain of 82dB. The 0.18${\mu}m$ CMOS process was chosen to reduce the driven voltage as well as the power dissipation.

• JSTS:Journal of Semiconductor Technology and Science
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• 제5권4호
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• pp.276-281
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• 2005

This paper presents a low voltage operating IF QPSK receiver block which is consisted of programmable gain amplifier (PGA) and analog to digital converter. This PGA has 6 bit control and 250MHz bandwidth, $0{\sim}20\;dB$ gain range. Using the proposed PGA architecture (low distortion gain control switch block), we can process the continuous fully differential $0.2{\sim}2.5Vpp$ input/output range and 44MHz carrier with 2 MHz bandwidth signal at 1.8V supply voltage. Using the sub-sampling technique (input freq. is $44{\sim}46MHz$, sampling freq. is 25MHz), we can process the IF QPSK signal ($44{\sim}46MHz$) which is the output of the 6 bit PGA. We can get the SNDR 35dB, which is the result of PGA and ADC at full gain mode. We fabricated the PGA and ADC and the digital signal processing block of the IF QPSK with the 0.18um CMOS MIM process 1.8V Supply.

• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 2006년도 춘계학술대회 학술발표 논문집 제16권 제1호
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• pp.302-305
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• 2006

A problem that arises in most communication receivers concerns the wide variation in power level of the signals received at the antenna. These variations cause serious problems which can usually be solved in receiver design by using Automatic Gain Control (AGC). AGC is achieved by using an amplifier whose gain can be controlled by external current or voltage. However, the AGC circuit does not respond to rapid changes in the amplitude of input. If input changes instantaneously, then even if op-amps could follow the change, the envelope detector capacitor could not, since the capacitor's voltage could not change instantaneously. To alleviate this deficiency, we present Improved Automatic Gain Control Circuit (IAGCC) replacing AGC circuit to FLC.

• Journal of Power Electronics
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• 제19권3호
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• pp.665-675
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• 2019

Renewable energy based on photovoltaic systems is beginning to play an important role to supply power to remote areas all over the world. Owing to the lower output voltage of photovoltaic arrays, high gain DC-DC converters with a high efficiency are required in practice. This paper presents a novel interleaved DC-DC boost converter with a high voltage gain, where the input terminal is interlaced in parallel and the output terminal is staggered in series (IPOSB). The IPOSB configuration can reduce input current ripples because two inductors are interlaced in parallel. The double output capacitors are charged in staggered parallel and discharged in series for the load. Therefore, IPOSB can attain a high step-up conversion and a lower output voltage ripple. In addtion, the output voltage can be automatically divided by two capacitors, without the need for extra sharing control methods. At the same time, the voltage stress of the power devices is lowered. The inrush current problem of capacitors is restrained by the inductor when compared with high gain converters with a switching-capacitor structure. The working principle and steady-state characteristics of the converter are analyzed in detail. The correctness of the theoretical analysis is verified by experimental results.

• 전력전자학회논문지
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• 제9권3호
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• pp.275-284
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• 2004

본 논문은 동적전압보상기(DVR)의 제어를 위한 우수한 성능의 디지털제어기를 제시하고 제어이득(Control Gain)의 설정에 관하여 논한다. DVR계통의 전력회로를 분석하여 DVR의 운전한계를 찾고 그에 따른 제어목표 및 제어기 구조를 제시한다. 디지털 제어기는 인버터의 PWM 스위칭과 함께 제어시스템의 시간지연을 야기한다. 이러한 시간 지연은 제어시스템의 전달함수를 1차수 높게 하여 제어시스템을 더한층 복잡하고 불안정하게 한다. 본 논문은 제어기의 시간지연을 고려하여 제안된 제어기의 이득을 설정하는 방법을 제시하고 인버터의 스위칭 주파수와 관련하여 출력측 필터요소의 설계지침을 제시한다. 제안된 설계방법에 의하여 전디지털화(Full Digital Control) 된 DVR 시스템을 제작하여 이론을 검증한다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제11권4호
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• pp.336-343
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• 2011

This paper introduces a simple variable gain amplifier (VGA) structure that shows an inherently dB-linear gain control property. Requiring no additional components for dB-linear control, the structure is compact and power efficient. The designed two-stage VGA shows a gain control range of 60dB with the gain error in the range of ${\pm}0.4$ dB. The power consumption including the output buffer is 20.4 mW from 1.2 V supply voltage with bandwidth of 630 MHz. The prototype was fabricated in a 0.13 ${\mu}m$ CMOS process and the VGA core occupies 0.06 $mm^2$.

• 전기학회논문지
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• 제65권1호
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• pp.23-30
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• 2016

Wake effects cause wind turbine generators (WTGs) within a wind power plant (WPP) to produce different levels of active power and subsequent reactive power capabilities. Further, the impedance between a WTG and the point of interconnection (POI)-which depends on the distance between them-impacts the WPP's reactive power injection capability at the POI. This paper proposes a voltage control scheme for a WPP based on the available reactive current of the doubly-fed induction generators (DFIGs) and its impacts on the POI to improve the reactive power injection capability of the WPP. In this paper, a design strategy for modifying the gain of DFIG controller is suggested and the comprehensive properties of these control gains are investigated. In the proposed scheme, the WPP controller, which operates in a voltage control mode, sends the command signal to the DFIGs based on the voltage difference at the POI. The DFIG controllers, which operate in a voltage control mode, employ a proportional controller with a limiter. The gain of the proportional controller is adjusted depending on the available reactive current of the DFIG and the series impedance between the DFIG and the POI. The performance of the proposed scheme is validated for various disturbances such as a reactive load connection and grid fault using an EMTP-RV simulator. Simulation results demonstrate that the proposed scheme promptly recovers the POI voltage by injecting more reactive power after a disturbance than the conventional scheme.

• Journal of Power Electronics
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• 제19권1호
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• pp.201-210
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• 2019

This paper proposes a multimode hybrid control strategy that can achieve zero-voltage switching of primary switches and zero-current switching of secondary rectifier diodes in a wide input voltage range for full-bridge LLC resonant converters. When the input voltage is lower than the rated voltage, the converter operates in Mode 1 through the variable-frequency control strategy. When the input voltage is higher than the rated voltage, the converter operates in Mode 2 through the VF and phase-shift control strategy until the switching frequency reaches the upper limit. Then, the converter operates in Mode 3 through the constant-frequency and phase-shift control strategy. The secondary-side diode current will operate in the discontinuous current mode in Modes 1 and 3, whereas it will operate in the boundary current mode in Mode 2. The current RMS value and conduction loss can be reduced in Mode 2. A detailed theoretical analysis of the operation principle, the voltage gain characteristics, and the realization method is presented in this paper. Finally, a 500 W prototype with 100-200 V input voltage and 40 V output voltage is built to verify the feasibility of the multimode hybrid control strategy.