• Journal of Korea Society of Industrial Information Systems
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• v.20 no.6
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• pp.29-36
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• 2015

This paper presents an LED backlight driver IC consisting of three linear current regulators and an output-voltage regulation loop with a self-adjustable reference voltage. In the proposed LED driver, the output voltage is controlled by dual feedback loops. The first loop senses and controls the output voltage, and the second loop senses the voltage drop of the linear current regulator and adjusts the reference voltage. With these feedback loops, the voltage drop of the linear current regulator is maintained at a minimum value, at which the driver efficiency is maximized. The output of the driver is a three-channel LED setup with four LEDs in each channel. The luminance is adjusted by the PWM dimming signal. The proposed driver is designed by a $0.35-{\mu}m$ 60-V high-voltage process, resulting in an experimental maximum efficiency of approximately 85%.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.692-695
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• 2008

Large area emissive displays have problems with nonuniform pixel characteristics and their individual ageing. A pixel integrated driver with pixel based optical feedback is presented to solve these problems. Photodetectors, optical feedback circuit and data handling capabilities are integrated in a high voltage CMOS technology.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.10
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• pp.1513-1517
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• 2012

As demands for green industry increase, this paper proposes a power control technique that can substitute pre -existing CCFL(Cold Cathode Fluorescent Lamp) and optimize power consumption of LED BLU. This technique is designing LED driver circuit that make a DC-DC output voltage(VLED) to have a linear control function for a supply voltage of LED string. The proposed LED driver have an advantage that can increase or decrease a DC-DC output voltage compared with conventional LED driver. The designed LED driver circuit was designed using 0.35um CMOS technology. And its operation was verified through simulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.4 s.334
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• pp.53-60
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• 2005

This work Proposes and describes an LCD backlight driver IC using a voltage feedback circuit which improves the brightness uniformity. The proposed circuit controls the brightness of a backlight by amplifying of sampling voltage at a lamp. To keep the uniformity of brightness, the circuit has a reference lamp. The output voltage of the reference lamp is supplied commonly to each lamp that reduces a resistance deviation of the lamps. As a result, the proposed circuit shows brightness uniformity improvement of about $40\%$ compared to the conventional ones.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.8
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• pp.54-61
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• 2001

A fully on-chip open-drain CMOS output driver was designed for high bandwidth DRAMs, such that its output voltage swing was insensitive to the variations of temperature and supply voltage. An auto refresh signal was used to update the contents of the current control register, which determined the transistors to be turned-on among the six binary-weighted transistors of an output driver. Because the auto refresh signal is available in DRAM chips, the output driver of this work does not require any external signals to update the current control register. During the time interval while the update is in progress, a negative feedback loop is formed to maintain the low level output voltage ($V_OL$) to be equal to the reference voltage ($V_{OL.ref}$) which is generated by a low-voltage bandgap reference circuit. Test results showed the successful operation at the data rate up to 1Gb/s. The worst-case variations of $V_{OL.ref}$ and $V_OL$ of the proposed output driver were measured to be 2.5% and 7.5% respectively within a temperature range of $20^{\circ}C$ to $90^{\circ}C$ and a supply voltage range of 2.25V to 2.75V, while the worst-case variation of $V_OL$ of the conventional output driver was measured to be 24% at the same temperature and supply voltage ranges.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.567-570
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• 2002

The LVDS (Low Voltage Differential Signaling) I/O cells, fully compatible with ANSI TIA/ EIA-644 LVDS standard, are designed using a 0.35${\mu}m$ standard CMOS technology. With a single 3V supply, the core cells operate at 1.34Gbps and power consumption of the output driver and the input receiver is 10. 5mW and 4.2mW, respectively. In the output driver, we employ the DCMFB (Dynamic Common-Mode FeedBack) circuit which can control the DC offset voltage of differential output signals. The SPICE simulation result of the proposed output driver shows that the variation of the DC offset voltage is 15.6% within a permissible range. In the input receiver, the proposed dual input stage with a positive feedback latch covers rail-to-rail input common-mode range and enables a high-speed, low-power operation. 5-channels of the proposed LVDS I/O pair can handle display data up to 8-bit gray scale and UXGA resolution.

• The Journal of the Korea institute of electronic communication sciences
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• v.13 no.6
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• pp.1177-1182
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• 2018

We designed a 500W zero voltage switching DC / DC converter operating at 100Mhz with phase shift topology using UCC3895 driver. The dead time of the UCC3895 driver is designed so that the leading and lagging leg of the full bridge can be driven separately. So, the dead time can be given between the two legs separately. The dead time, which is an asymmetrical relationship between the two legs, enables the implementation of zero voltage switching. This paper proposed a negative feedback circuit design method for stable output voltage. The maximum efficiency of the prototype was 95.5% at $500{\Omega}$ load.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.161-165
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• 2023

This paper designed a voltage feedback driving circuit to compensate for the characteristic deviation of the Active Matrix Organic Light Emitting Diode driving Thin Film Transistor. This paper describes a stable and fast circuit by applying charge sharing and polar stabilization methods. A 12-inch Organic Light Emitting Diode with a Double Wide Ultra eXtended Graphics Array resolution creates a screen distortion problem for line parasitism, and charge sharing and polar stabilization structures were applied to solve the problem. By applying Charge Sharing, all data lines are shorted at the same time and quickly positioned as the average voltage to advance the compensated change time of the gate voltage in the next operation period. A buffer circuit and a current pass circuit were added to lower the Amplifier resistance connected to the line as a polar stabilization method. The advantage of suppressing the Ringing of the driving Thin Film Transistor can be obtained by increasing the stability. As a result, a circuit was designed to supply a stable current to the Organic Light Emitting Diode even if the characteristic deviation of the driving Thin Film Transistor occurs.

• Journal of Power Electronics
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• v.13 no.4
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• pp.609-618
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• 2013

This paper proposes a primary side constant power control scheme for TRIAC dimmer compatible LED drivers. The LED driver is a Flyback converter operated in boundary conduction mode (BCM) to minimize the switching loss. With the proposed control scheme, the input power of the Flyback converter can be controlled by the TRIAC dimming angle, which is not affected by AC input voltage variations. Since the output voltage is almost constant for LED loads, the output current can be changed by controlling the input power with a given conversion efficiency. The isolated feedback circuit is eliminated with the proposed primary side control scheme, which dramatically simplifies the whole circuit. In addition, the input current automatically follows the input voltage due to the BCM operation, and the resistive input characteristic can be achieved which is attractive for TRIAC dimming applications. Experimental results from a 15W prototype verify the theoretical analysis.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.7
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• pp.10-16
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• 1999

This paper describes a low voltage swing bus driver using FCSR(Feedback Control Swing voltage Reduction) which can control bus swing voltage within a few hundred of mV. It is proposed to reduce power consumption in On-chip interface, especially for MDL(Merged DRAM Logic) architecture wihich has wide and large capacitance bus. FCSR operates on differential signal dual-line bus and on precharged bus with block controlling fuction. We modeled driver and bus to scale driver size automatically when bus environment is variant. We also modeled coupling capacitance noise(crosstalk) of neighborhood lines which operate on odd mode with parallel current source to analysis crosstalk effect in the victim-line according as voltage transition in the aggressor-line and environment in the victim-line. We built a test chip which was designed to swing 600mV in bus, shows 70Mhz operation at 3.3V, using Hyundai 0.8um CMOS technology. FCSR operate with 250Mhz at 3.3V by Hspice simulation.