• 제목/요약/키워드: Voltage Divider

검색결과 142건 처리시간 0.032초

154kV급 실증시험용 인텔리전트 변전소 구축 (Construction of 154kV Intelligent Substation for Verification Test)

  • 정영환;김민수;김정배;이학성;최인혁;이동일
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 제37회 하계학술대회 논문집 A
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    • pp.456-457
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    • 2006
  • We have carried out the construction of the 154kV intelligent substation with KEPRI. The Intelligent substation is built in Gochang testing facility of KEPCO and consists of electronic instruments for GIS(gas insulated switchgear), digital control panel, remote monitoring and diagnosis system, and digital relay system. Rogowski coil type CT(RCT) and capacitive voltage divider(CVD) are introduced compared with the instrument transformer of conventional type. Digital control Panel(DCP) replaces the LCP(local control panel) which is drived for mechanical operation. For the monitoring of the condition of GIS and TR, various sensors are used. In this Paper, we mention the synopsis and report the progress state of project.

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154kV급 인텔리전트 변전소 구축 (Construction of Intelligent Substation for 154kV Class)

  • 정영환;양대일;김정배;송원표;최인혁;김정호;이동일
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 제36회 하계학술대회 논문집 A
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    • pp.33-35
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    • 2005
  • We perform intelligent substation construction of 154kV class with KEPRI. The intelligent substation is build in Gochang 765kV testing facility and consists of electronic instruments, digital control panel, remote monitoring and diagnosis system and digital relay system. Rogowski coil type CT(RCT) and capacitive voltage divider(CVD) are applicable for instrument transformer of conventional type. Digital control panel(DCP) replaces local panel which is drived by mechanical operation. For monitoring condition of GIS and TR, various sensors are used. In this paper, we report the synopsis and the progress state of project.

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154kV급 인텔리전트 변전소 구축 (Construction of Intelligent Substation for 154kV Class)

  • 정영환;양대일;김정배;최인혁;김정호;이동일
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 추계학술대회 논문집 전력기술부문
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    • pp.129-130
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    • 2005
  • We perform intelligent substation construction of 154kV class with KEPRI. The intelligent substation is build in Gochang 765kV testing facility and consists of electronic instruments, digital control panel, remote monitoring and diagnosis system, and digital relay system. Rogowski coil type CT(RCT) and capacitive voltage divider(CVD) are applicable for instrument transformer of conventional type. Digital control panel(DCP) replaces local panel which is drived by mechanical operation. For monitoring rendition of GIS and TR, various sensors are used. In this paper, we report the synopsis and the progress state of project.

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154kV 인텔리전트 변전소 구축 (Intelligent Substation Construction of 154kV Class)

  • 김정배;정영환;송원표;최인혁;김정호;이동일;고희석
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2004년도 하계학술대회 논문집 A
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    • pp.524-526
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    • 2004
  • We perform intelligent substation construction of 154kV class with KEPRI. The intelligent substation is build in Gochang 765kV testing facility and consists of electronic instruments, digital control panel, remote monitoring and diagnosis system, and digital relay system. Rogowski coil type CT(RCT) and capacitive voltage divider(CVD) are applicable for instrument transformer of conventional type. Digital control panel(UP) replaces local panel which is drived by mechanical operation. For monitoring condition of GIS and TR, various sensors are used. In this paper, we report the synopsis and the progress state of project.

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GSM / WCDMA 통신용 이중대역 CMOS 주파수 합성기 설계 (Design of a Dual band CMOS Frequency Synthesizer for GSM and WCDMA)

  • 한윤택;윤광섭
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2008년도 하계종합학술대회
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    • pp.435-436
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    • 2008
  • This paper presents a dual band frequency synthesizer for GSM and Wideband CDMA which is designed in a standard 0.13um CMOS 1P6M process. The shared components include phase frequency detector (PFD), charge pump (CP), loop filter, integer frequency divider(128/129 DMP, 4bit PC, 3bit SC) and Low noise Ring-VCO. A high-speed low power dual modulus prescaler is proposed to operate up to 2.1GHz at 3.3V supply voltage with 2mW power consumption by simulation. The simulated phase noise of VCO is -101dBc/Hz at 200kHz offset frequency from 1.9GHz.

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A Simple Continuous Conduction Mode PWM Controller for Boost Power Factor Correction Converter

  • Tanitteerapan, Tanes;Mori, Shinsaku
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 ITC-CSCC -2
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    • pp.1030-1033
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    • 2002
  • This paper, a new simple controller operates in continuous conduction mode (CCM) for Boost power factor collection converter is introduced. The duty ratios are obtained by comparisons of a sensed signal from inductor current and a negative ramp carrier waveform in each switching period. By using the proposed controller, input voltage sensing, error amplifier in the current feedback loop, and analog multiplier/divider are not required, then, the control circuit implementation is very simple. To verify the proposed controller, the circuit simulation for Boost power factor correction converter was applied. For the results, the input current waveform was shaped to be closely sinusoidal, implying low THD.

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주파수 동기를 위한 저 잡음 2.5V 300Mhz CMOS PLL (A Low-Jitter 2.5V 300MHZ CMOS PLL for Frequency Synthesizer)

  • 권진규;이종화;조상복
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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    • pp.1189-1192
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    • 2003
  • 본 논문에서는 노이즈를 고려한 PLL를 설계하였다. 30Mhz∼300Mhz으로 동작하는 VCO를 설계하였다. VCO를 평균 250Mhz으로 동작하도록 하고 reference 주파수, 62.5Mhz로 locking하는 PLL를 설계를 하였다. 300Mhz PLL의 기본적인 구조로 PLL은 PFD(Phase frequency detector), CP(Charge Pump), LF(Loop filter), VCO(Voltage controlled Oscillator)와 Divider로 구성되었다. PFD과 CP는 Dead Zone를 줄이고, 큰 gm를 가지도록 설계를 하였다. PLL에서 가장 중요한 블락인, VCO는 One Chip으로 설계하기 위해 Ring Oscillator로 설계를 하였다. 2.5V 62.5MHZ의 외부 신호를 300MHZ을 발진하는 VCO에서 분주하여 clock synthesizer를 설계하였다. 본 논문은 Hynix0.25공정을 사용하여 설계를 하였으며, 2.5V의 공급 전원을 사용하였다.

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공정과 온도 보상된 400 MHz 주파수합성기 (A process and temperature compensated 400 MHz Frequency Synthesizer)

  • 이성권;이순섭;김수원
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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    • pp.193-196
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    • 2001
  • One of the major reasons for not integrating a VCO on one-chip in a PLL (phase locked loop) system is the large chip-to-chip variation of the VCO (voltage controlled oscillator) center frequency. In this thesis, a simple bias technique is proposed to compensate the process fluctuation. The proposed bias technique is applied to the VCO and it reduces the deviation of the VCO center frequency from 35% to 8 %. With the suggested bias technique, a 400 MHz frequency synthesizer is designed for general purpose. It utilizes a programmable divider for various division ratio. The design methodology provides the possibility of the one-chip solution for a PLL system.

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이종의 인두기 히터를 제어하는 솔더링 스테이션 (A soldering station controller for two types heater)

  • 오갑석
    • 동력기계공학회지
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    • 제19권3호
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    • pp.48-54
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    • 2015
  • This paper introduced a design method of soldering station that can control two types of soldering iron heater. At design time, to distinguish two types of soldering iron heater the voltage divider rule has been applied, and the distinguished resistor is inserted to handler of soldering iron to prevent misuse by users. And an algorithm to design a PID controllers is proposed. The proposed controllers parameter which can be easily realized, and are designed by using the input output data from systems, and have outstanding ability making the output response of nonlinear systems similar to the desired one. Temperature control experiments were performed to verify the ability of the suggested controller. As a result, suggested PID controller followed the desired ones, and one soldering station can control the various type of soldering irons in real time.

245kV GIS용 전자식변성기 개발 (The Development of Electronic Transformer for 245kV GIS)

  • 김영민;김민수;김정배;이학성
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2008년도 제39회 하계학술대회
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    • pp.373-374
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    • 2008
  • 지금까지 변전소나 발전소에서 전류, 전압을 계측하는 수단으로서 주로 철심과 권선으로 구성되어진 변류기(CT), 계기용 변압기(PT)가 사용되어져 왔다. 최근, 2차측의 계측기나 보호 Relay의 Digital 화가 진전되어져 있다. 또한, Digital Network로 총합한 Intelligent 변전소가 시범적으로 구축되어짐에 따라 Digital Network에 대응한 초고압용 신형 CT, VD가 요구되어지고 있다. 상기와 같은 요구로 인해 당사에서는 기존의 CT.PT의 단점을 보완할 수 있는 245kV GIS용 로고스키코일형 CT와 Capacitive Voltage Divider를 개발 중에 있으며, 센서 자체의 특성시험에서 IEC 60044-7, 8 1Class 기준을 만족하는 특성을 얻을 수 있었다. 이러한 신형 CT.VD의 적용으로 종래의 CT.PT가 차지하는 공간이 필요 없게 되어 컴팩트한 GIS의 구조가 가능하게 될 것이다.

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