• Title/Summary/Keyword: Voltage Disturbance

Search Result 248, Processing Time 0.021 seconds

Study of Modulation Effect in Integrated Interface Under Controlling Switching Light-Emitting Diode Lighting Module

  • Hong, Geun-Bin;Jang, Tae-Su;Kim, Yong-Kab
    • Transactions on Electrical and Electronic Materials
    • /
    • v.12 no.6
    • /
    • pp.253-257
    • /
    • 2011
  • This study was carried out to solve problems such as radio frequency band depletion, confusion risk, and security loss in existing visible wireless communication systems, and to determine the applicability of next-generation networks. A light-emitting diode (LED) light communication system was implemented with a controlling switching light module using the ATmega16 micro-controller. To solve the existing modulation effect and disturbance in visible light communication, an integrated interface was evaluated with a driving light module and analyzes its reception property. A transmitter/receiver using the ATmel's micro-controller, high-intensity white LED-6 modules, and infrared sensor KSM60WLM and visible sensor TSL250RD were designed. An experiment from the initial value of distance to 2.5 m showed 0.46 V of the voltage loss, and if in long distance, external light interference occurred and light intensity was lost by external impact and thus data had to be modified or reset repeatedly. Additionally, when we used 6 modules through the remote controller's lighting dimming, data could be transmitted up to 1.76 m without any errors during the day and up to 2.29 m at night with around 2~3% communication error. If a special optical filter can reduce as much external light as possible in the integrated interface, the LED for lighting communication systems may be applied in next generation networks.

Protection properties of HTS coil charging by rotary HTS flux pump in charging and compensation modes

  • Han, Seunghak;Kim, Ji Hyung;Chae, Yoon Seok;Quach, Huu Luong;Yoon, Yong Soo;Kim, Ho Min
    • Progress in Superconductivity and Cryogenics
    • /
    • v.23 no.4
    • /
    • pp.19-24
    • /
    • 2021
  • The low normal zone propagation velocity (NZPV) of high-temperature superconducting (HTS) tape leads to a quench protection problem in HTS magnet applications. To overcome this limitation, various studies were conducted on HTS coils without turn-to-turn insulation (NI coils) that can achieve self-protection. On the other hand, NI coils have some disadvantages such as slow charging and discharging time. Previously, the HTS coils with turn-to-turn insulation (INS coils) were operated in power supply (PS) driven mode, which requires physical contact with the external PS at room-temperature, not in persistent current mode. When a quench occurs in INS coils, the low NZPV delays quench detection and protection, thereby damaging the coils. However, the rotary HTS flux pump supplies the DC voltage to the superconducting circuit with INS coils in a non-contact manner, which causes the INS coils to operate in a persistent current mode, while enabling quench protection. In this paper, a new protection characteristic of HTS coils is investigated with INS coils charging through the rotary HTS flux pump. To experimentally verify the quench protection characteristic of the INS coil, we investigated the current magnitude of the superconducting circuit through a quench, which was intentionally generated by thermal disturbances in the INS coil under charging or steady state. Our results confirmed the protection characteristic of INS coils using a rotary HTS flux pump.

Design of Subthreshold SRAM Array utilizing Advanced Memory Cell (개선된 메모리 셀을 활용한 문턱전압 이하 스태틱 램 어레이 설계)

  • Kim, Taehoon;Chung, Yeonbae
    • Journal of IKEEE
    • /
    • v.23 no.3
    • /
    • pp.954-961
    • /
    • 2019
  • This paper suggests an advanced 8T SRAM which can operate properly in subthreshold voltage regime. The memory cell consists of symmetric 8 transistors, in which the latch storing data is controlled by a column-wise assistline. During the read, the data storage nodes are temporarily decoupled from the read path, thus eliminating the read disturbance. Additionally, the cell keeps the noise-vulnerable 'low' node close to the ground, thereby improving the dummy-read stability. In the write, the boosted wordline facilitates to change the contents of the memory bit. At 0.4 V supply, the advanced 8T cell achieves 65% higher dummy-read stability and 3.7 times better write-ability compared to the commercialized 8T cell. The proposed cell and circuit techniques have been verified in a 16-kbit SRAM array designed with an industrial 180-nm low-power CMOS process.

The Developed Study for SMPS to Protect the Noise and Inrush Current at LED Lighting Source (LED 광원에서 잡음 및 돌입전류 방지를 위한 스위칭모드 전원공급 장치 (SMPS) 개발 연구)

  • Chung, Chansoo;Hong, Gyujang;We, Sungbok;Yu, Geonsu;Kim, Mijin
    • KEPCO Journal on Electric Power and Energy
    • /
    • v.2 no.4
    • /
    • pp.577-582
    • /
    • 2016
  • This Study focused on the development of SMPS (Switching Mode Power Supply) to supply the constant votage and current nevertheless LED fluorescent Light generated the electric noise (with Harmonics) and Inrush current at instant time of turn-on and off. Recently, according to the Green policy in government, the LED fluorescent Lighter showed the rapidly increasing tend as indoor and outdoor Lighter. But, because of costs, LED fluorescent Light not considered and neglected the following items; power factor, efficiency, Harmonics and Inrush current. So, we are developed the SMPS about 3 key issues as follows: 1st, power factor and efficiency is 85%. 2nd, the switching noisy by harmonic is minimized. 3rd, the Inrush current at turn on and off time is reduced the minimum 0.3 A after $100{\mu}sec$ on turnon time. The proposed SMPS adjusted by LNK 409 driver (included the high frequency modulation function). Although, the developed SMPS maintained the about 85% of power factor and efficiency. but, the SMPS must be generated low heat by the variation of minute load current at switching timing. To improve the above weak point, the developed SMPS have the feedback monitoring circuit between input side and output side to maintain the power factor and efficiency. Also, we are studied the time-constant of control circuit to output the constant voltage and current nevertheless the load disturbance of LED lighting. The LED fluorescent Light of 46W is checked the above items.

PR Controller Based Current Control Scheme for Single-Phase Inter-Connected PV Inverter (PR제어기를 이용한 단상 계통 연계형 태양광 인버터 설계)

  • Vu, Trung-Kien;Seong, Se-Jin
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.10 no.12
    • /
    • pp.3587-3593
    • /
    • 2009
  • Nowadays, the PV systems have been focused on the interconnection between the power source and the grid. The PV inverter, either single-phase or three-phase, can be considered as the core of the whole system because of an important role in the grid-interconnecting operation. An important issue in the inverter control is the load current regulation. In the literature, the Proportional+Integral (PI) controller, normally used in the current-controlled Voltage Source Inverter (VSI), cannot be a satisfactory controller for an ac system because of the steady-sate error and the poor disturbance rejection, especially in high-frequency range. By comparison with the PI controller, the Proportional+Resonant (PR) controller can introduce an infinite gain at the fundamental ac frequency; hence can achieve the zero steady-state error without requiring the complex transformation and the dq-coupling technique. In this paper, a PR controller is designed and adopted for replacing the PI controller. Based on the theoretical analyses, the PR controller based control strategy is implemented in a 32-bit fixed-point TMS320F2812 DSP and evaluated in a 3kW experimental prototype Photovoltaic (PV) power conditioning system (PCS). Simulation and experimental results are shown to verify the performance of implemented control scheme in PV PCS.

Comparison of PI and PR Controller Based Current Control Schemes for Single-Phase Grid-Connected PV Inverter (단상 계통 연계형 태양광 인버터에 사용되는 PI 와 PR 전류제어기의 비교 분석)

  • Vu, Trung-Kien;Seong, Se-Jin
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.11 no.8
    • /
    • pp.2968-2974
    • /
    • 2010
  • Nowadays, the PV systems have been focused on the grid connection between the power source and the grid. The PV inverter can be considered as the core of the whole system because of an important role in the grid-interfacing operation. An important issue in the inverter control is the load current regulation. In the literature, Proportional Integral (PI) controller, which is normally used in the current-controlled Voltage Source Inverter (VSI), cannot be a satisfactory controller for an AC system because of the steady-sate error and the poor disturbance rejection, especially in high-frequency range. Compared with conventional PI controller, Proportional Resonant (PR) controller can introduce an infinite gain at the fundamental frequency of the AC source; hence it can achieve the zero steady-state error without requiring the complex transformation and the de-coupling technique. Theoretical analyses of both PI and PR controller are presented and verified by simulation and experiment. Both controller are implemented in a 32-bit fixed-point TMS320F2812 DSP processor and evaluated on a 3kW experimental prototype PV Power Conditioning System (PCS). Simulation and experimental results are shown to verify the controller performances.

Development of a battery management system(BMS) simulator for electric vehicle(EV) cars (EV용 배터리 관리시스템(BMS) 시뮬레이터 개발)

  • Park, Chan-Hee;Kim, Sang-Jung;Hwang, Ho-Suk;Lee, Hee-Gwan
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.13 no.6
    • /
    • pp.2484-2490
    • /
    • 2012
  • This study reports on the development and performance verification of cell simulation boards of simulator and the embedded program for board control of the battery management system (BMS) of electric vehicle (EV) cars, which manages the next-generation automotive lithium-ion battery pack. Here, we have improved the speed of the simulator by using operational (OP) amplifier and transistors that were connected in series. In addition, using a digital analog converter (DAC) in each channel, we have improved the performance by channel-to-channel isolation (isolation) as compared to the traditional methods. Furthermore, by constructing a current-limiting protection circuit, one can be protected from disturbance and, by utilizing a precision shunt resistor for the current sensor, we have increased the precision of the current control. In order to verify the performance of the developed simulator, we have performed the experiment 10 times, with values ranging from 0.5 V to 5 V, and a voltage drop step of 0.5 V. Significance analysis of experimental data, and repeatability tests were performed, showing an average standard deviation of 0.001~0.004 V, indicating high repeatability and high statistical significance of the current method and system.

A Non-Calibrated 2x Interleaved 10b 120MS/s Pipeline SAR ADC with Minimized Channel Offset Mismatch (보정기법 없이 채널 간 오프셋 부정합을 최소화한 2x Interleaved 10비트 120MS/s 파이프라인 SAR ADC)

  • Cho, Young-Sae;Shim, Hyun-Sun;Lee, Seung-Hoon
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.52 no.9
    • /
    • pp.63-73
    • /
    • 2015
  • This work proposes a 2-channel time-interleaved (T-I) 10b 120MS/s pipeline SAR ADC minimizing offset mismatch between channels without any calibration scheme. The proposed ADC employs a 2-channel SAR and T-I topology based on a 2-step pipeline ADC with 4b and 7b in the first and second stage for high conversion rate and low power consumption. Analog circuits such as comparator and residue amplifier are shared between channels to minimize power consumption, chip area, and offset mismatch which limits the ADC linearity in the conventional T-I architecture, without any calibration scheme. The TSPC D flip-flop with a short propagation delay and a small number of transistors is used in the SAR logic instead of the conventional static D flip-flop to achieve high-speed SAR operation as well as low power consumption and chip area. Three separate reference voltage drivers for 4b SAR, 7b SAR circuits and a single residue amplifier prevent undesirable disturbance among the reference voltages due to each different switching operation and minimize gain mismatch between channels. High-frequency clocks with a controllable duty cycle are generated on chip to eliminate the need of external complicated high-frequency clocks for SAR operation. The prototype ADC in a 45nm CMOS technology demonstrates a measured DNL and INL within 0.69LSB and 0.77LSB, with a maximum SNDR and SFDR of 50.9dB and 59.7dB at 120MS/s, respectively. The proposed ADC occupies an active die area of 0.36mm2 and consumes 8.8mW at a 1.1V supply voltage.