• 한국전기전자재료학회논문지
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• 제20권9호
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• pp.780-786
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• 2007

This paper describes the influence on partial discharge characteristics of defects at the model XLPE/EPDM interfaces of power cable joints. The defects of void and copper which could inadvertently be present at the joint interface. We measured ${\Phi}-n,\;{\Phi}-q$ patterns by a computer-aided partial discharge measuring system. Several parameters i, e, maximum discharge $q_{max}$ [pC], average discharge q [pC/cycle], and average angle of discharge ${\Theta}g$ [deg] were found to depend upon the defect type varying applied voltage. As the result of time evaluation, partial discharges are small different at copper defects, but is decreasing obviously about 20 minutes at void defect. It considered that difference of magnitude of total positive discharge of Q+ [pC] and total negative discharge of Q- [pC] is SPMD(swarming pulsive micro discharges).

• 마이크로전자및패키징학회지
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• 제14권3호
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• pp.37-42
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• 2007

반도체 소자의 집적도가 높아짐에 따라 3D SiP에 대한 관심이 높아지고 전기도금법을 이용한 구리 via filling이 활발히 연구되어왔다. Via filling시 via 입구와 바닥에 전류밀도 차이로 인해 via 내부에 결함이 발생하기 쉽다. 여러 가지 유기물 첨가제와 전류인가 방식의 변화를 통한 via filling을 하였다. 첨가된 유기물은 PEG, SPS, JGB, PEI를 사용하였다. 유기물이 첨가된 용액을 이용하여 펄스와 역펄스 방법을 이용하여 via filling을 하였다. 유기물의 첨가에 따른 도금된 구리 입자의 크기 및 형상에 관하여 고찰하였으며 도금 후 via 시편의 단면을 FESEM으로 관찰하였다. JGB에 비하여 PEI를 사용한 경우 치밀한 도금층을 얻을 수 있었다. 2 step via filling을 사용한 경우 via filling 시간을 단축시킬 수 있었다.

• 마이크로전자및패키징학회지
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• 제19권2호
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• pp.55-59
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• 2012

TSV 비아필링 과정이 진행되는 동안 내부에 void나 seam과 같은 결함이 빈번하게 발견되고 있다. 결함 없는 구리 비아필링을 위해서는 용액 내에 가속제, 억제제, 평활제 등의 유기물 첨가제가 필요하다. 공정과정중 유기물 첨가제의 분해로 인한 부산물로부터 기인한 오염은 디바이스의 신뢰도나 용액의 수명을 감소시키는 요인이 된다. 본 연구에서는 첨가제의 사용량을 줄이기 위하여 가속제와 억제제를 사용하지 않고 평활제만을 이용한 구리 비아필링에 관한 연구를 진행하였다. 세가지 종류의 첨가제(janus green B, methylene violet, diazine black)를 이용한 구리 전착에 관한 연구를 수행하였다. 각각의 첨가제에 따른 전기화학적 거동을 분석한 결과 도금속도적 측면에서 차이를 나타내는 것을 확인할 수 있었다. 비아필링 진행 후 단면을 분석하여 각각의 평활제가 비아필링에 미치는 영향을 확인하였으며, 그 특성은 다르게 나타나는 것을 확인할 수 있었다.

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2018년도 춘계학술대회 논문집
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• pp.102-102
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• 2018

Electronic industry had required the finer size and the higher performance of the device. Therefore, 3-D die stacking technology such as TSV (through silicon via) and micro-bump had been used. Moreover, by the development of the 3-D die stacking technology, 3-D structure such as chip to chip (c2c) and chip to wafer (c2w) had become practicable. These technologies led to the appearance of HBM (high bandwidth memory). HBM was type of the memory, which is composed of several stacked layers of the memory chips. Each memory chips were connected by TSV and micro-bump. Thus, HBM had lower RC delay and higher performance of data processing than the conventional memory. Moreover, due to the development of the IT industry such as, AI (artificial intelligence), IOT (internet of things), and VR (virtual reality), the lower pitch size and the higher density were required to micro-electronics. Particularly, to obtain the fine pitch, some of the method such as copper pillar, nickel diffusion barrier, and tin-silver or tin-silver-copper based bump had been utillized. TCB (thermal compression bonding) and reflow process (thermal aging) were conventional method to bond between tin-silver or tin-silver-copper caps in the temperature range of 200 to 300 degrees. However, because of tin overflow which caused by higher operating temperature than melting point of Tin ($232^{\circ}C$), there would be the danger of bump bridge failure in fine-pitch bonding. Furthermore, regulating the phase of IMC (intermetallic compound) which was located between nickel diffusion barrier and bump, had a lot of problems. For example, an excess of kirkendall void which provides site of brittle fracture occurs at IMC layer after reflow process. The essential solution to reduce the difficulty of bump bonding process is copper to copper direct bonding below $300^{\circ}C$. In this study, in order to improve the problem of bump bonding process, copper to copper direct bonding was performed below $300^{\circ}C$. The driving force of bonding was the self-annealing properties of electrodeposited Cu with high defect density. The self-annealing property originated in high defect density and non-equilibrium grain boundaries at the triple junction. The electrodeposited Cu at high current density and low bath temperature was fabricated by electroplating on copper deposited silicon wafer. The copper-copper bonding experiments was conducted using thermal pressing machine. The condition of investigation such as thermal parameter and pressure parameter were varied to acquire proper bonded specimens. The bonded interface was characterized by SEM (scanning electron microscope) and OM (optical microscope). The density of grain boundary and defects were examined by TEM (transmission electron microscopy).