• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.24 no.7B
• /
• pp.1393-1399
• /
• 1999

In this paper, a VLSI design of the convolutional codec chip of code rate r=l/3, and constraint length K=9 is presented, which is able to correct errors of the received data when transmitted data is corrupted in channels. The circuit design mainly aimed for simple implementation. In the decoder, Viterbi algorithm with 3-bit soft-decision is employed. For information sequence updating and storage, the register exchange method is employed, where the register length is 5$\times$K(45 stages). The codec chip is designed using VHDL language and Design Analyzer and VHDL Simulator of Synopsys are used for simulation and synthesis. The chip is composed of ENCODER block, ALIGN block, BMC block, ACS block, SEL_MIN block and REG_EXCH block. The operation of the codec chip is verified though the logic simulations, where several error conditions are assumed. As a result of the timing simulation after synthesis, the decoding speed of 325.5Kbps is achieved, and 6,894 gates is used.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.30 no.3C
• /
• pp.77-82
• /
• 2005

Partial response maximum likelihood (PRML) detection using the Viterbi algorithm involves the calculation of likelihood metrics that determine the most likely sequence of decoded data. In general, it is assumed that branches at each node in the trellis diagram have same probabilities. If modulation code with minimum and maximum run-length constraints is used, the occurrence ratio (Ro) of each particular pattern is different, and therefore the assumption is not true. We present a calculation scheme of the likelihood metrics for the PRML detection using the occurrence ratio. In simulation, we have tested the two (1,7) run-length-limited codes and calculated the occurrence ratios as the orders of PR targets are changed. We can identify that the PRML detections using the occurrence ratio provide more than about 0.5dB gain compared to conventional PRML detections at 10/sup -5/ BER in high-density magnetic recording and optical recording channels.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.30 no.3A
• /
• pp.217-225
• /
• 2005

This paper presents specialized DSP instructions and their architecture for the Viterbi algorithm used in various wireless communication standards. The proposed architecture can significantly reduce the Trace Back (TB) latency. The proposed instructions perform the Add Compare Select (ACS) and TB operations in parallel and the architecture has special hardware, called the Offset Calculation Unit (OCU), which automatically calculates data addresses for the trellis butterfly computations. Logic synthesis has been Performed using the Samsung SEC 0.18 μm standard cell library. OCU consists of 1,460 gates and the maximum delay of OCU is about 5.75 ns. The BER performance of the ACS-TB parallel method increases about 0.00022dB at 6dB Eb/No compared with the typical TB method, which is negligible. When the constraint length K is 5, the proposed DSP architecture can reduce the decoding cycles about 17% compared with the Carmel DSP and about 45% compared with 7MS320c15x.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.38A no.9
• /
• pp.744-749
• /
• 2013

We propose soft user data input on LDPC codes with parity encoded by the (1, 7) run length limited (RLL) code for perpendicular magnetic recording channel. The user data are encoded by maximum transition run (MTR) (3;11) code. In order to minimize the loss of code rate, the (1, 7) RLL code only encode the parity of LDPC. Also, to increase performance, we propose only user data part applied soft output Viterbi algorithm (SOVA). The performance using the SOVA showed good performance lower than 26 dB. In contrast, it showed worse performance high than 26 dB. This is because of incorrect soft information by high jitter noise and two different input types for LDPC decoder.

• Journal of Korea Society of Industrial Information Systems
• /
• v.23 no.6
• /
• pp.79-94
• /
• 2018

The purpose of this study is to specify a probabilistic tracking mechanism for customer luxury purchase implemented by hidden Markov model, Bayesian inference, customer satisfaction and net promoter score. In this paper, we have designed a probabilistic model based on customer's actual data containing purchase or non-purchase states by tracking the SPC chain : customer satisfaction -> customer referral -> purchase/non-purchase. By applying hidden Markov model and Viterbi algorithm to marketing theory, we have developed the statistical model related to probability theories and have found the best purchase pattern scenario from customer's purchase records.

• The Journal of Korean Institute of Information Technology
• /
• v.17 no.3
• /
• pp.31-41
• /
• 2019

In this paper, we design and implement the simulator for the transmitter and receiver of 4D-8PSK TCM with 2.0, 2.25, 2.5, and 2.75 bits/symbol-channel transmission efficiency recommended by the CCSDS for satellite communications, and then analyze the BER performance of 4D-8PSK TCM system in AWGN channel. The transmitter of 4D-8PSK TCM is designed in accordance with the recommendation in the CCSDS standard. Meanwhile, for the receiver design of 4D-8PSK TCM, we design the differential decoder generalizing the differential encoder/decoder scheme. The trellis decoding algorithm is designed by applying the auxiliary trellis information and the Viterbi algorithm, and an 8-dimensional constellation mapper equation given in the CCSDS standard is deconstructed to design constellation mapper. Especially, we present the optimized receiver for 4D-8PSK TCM system by investigating the BER performances for the traceback lengths in the Viterbi decoder through computer simulations..

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
• /
• v.3 no.2
• /
• pp.30-38
• /
• 1992

In this paper, in order to apply the $\pi$/4 shift QPSK to TCM, we propose the $\pi$/8 shift 8PSK modulation technique and the trellis-coded $\pi$/8 shift 8PSK performing signal set expansion and set partition by phase difference. In addition, the Viterbi decoder with branch metrics of the squared Euclidean distance of the first phase difference as well as the Lth phase difference is introduced in order to improve the bit error rate(BER) performance in differential detection of the trellis-coded $\pi$/8 shift 8 PSK. The proposed Viterbi decoder is conceptually the same as the sliding multiple de- tection by using the branch metric with first and Lth order phase difference. We investigate the performance of the uncoded .pi. /4 shift QPSK and the trellis-coded $\pi$/8 shift 8PSK with or without the Lth phase difference metric in an additive white Gaussian noise (AWGN) and Rayleigh fading channel using the Monte Carlo simulation. The study shows that the $\pi$/4 shift QPSK with the Trellis-code i. e. the trellis-coded $\pi$/8 shift 8PSK is an attractive scheme for power and bandlimited systems and especially, the Viterbi decoder with first and Lth phase difference metrics improves BER performance. Also, the next proposed algorithm can be used in the TC $\pi$/8 shift 8PSK as well as TC MDPSK.

• Journal of KIISE:Software and Applications
• /
• v.35 no.5
• /
• pp.313-324
• /
• 2008

A sentence reduction is the information compression process which removes extraneous words and phrases and retains basic meaning of the original sentence. Most researches in the sentence reduction have required a large number of lexical and syntactic resources and focused on extracting or removing extraneous constituents such as words, phrases and clauses of the sentence via the complicated parsing process. However, these researches have some problems. First, the lexical resource which can be obtained in loaming data is very limited. Second, it is difficult to reduce the sentence to languages that have no method for reliable syntactic parsing because of an ambiguity and exceptional expression of the sentence. In order to solve these problems, we propose the sentence reduction method which uses templates and POS(part of speech) information without a parsing process. In our proposed method, we create a new sentence using both Sentence Reduction Templates that decide the reduction sentence form and Grammatical POS-based Reduction Rules that compose the grammatical sentence structure. In addition, We use Viterbi algorithms at HMM(Hidden Markov Models) to avoid the exponential calculation problem which occurs under applying to Sentence Reduction Templates. Finally, our experiments show that the proposed method achieves acceptable results in comparison to the previous sentence reduction methods.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.28 no.11C
• /
• pp.1045-1051
• /
• 2003

The SOVA, which produces the soft decision value, can be used as a sub-optimum solution for concatenated codes such as turbo codes, since it is computationally efficient compared with the optimum MAP algorithm. In this paper, we propose an efficient implementation of the SOVA used for decoding turbo codes, by reducing the number of calculations for soft decision values and trace-back operations. In order to utilize the memory efficiently, the whole block of turbo codes is divided into several sub-blocks in the proposed algorithm. It is demonstrated that the proposed algorithm requires less computation than the conventional algorithm, while providing the same overall performance.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• v.15 no.12
• /
• pp.4364-4384
• /
• 2021

The dynamic network state and the mobility of the terminals make the service function chain (SFC) orchestration mechanisms based on static and deterministic assumptions hard to be applied in SDN/NFV mobile edge computing networks. Designing dynamic and online SFC orchestration mechanism can greatly improve the execution efficiency of compute-intensive and resource-hungry applications in mobile edge computing networks. In order to increase the overall profit of service provider and reduce the resource cost, the system running time is divided into a sequence of time slots and a dynamic orchestration scheme based on an improved column generation algorithm is proposed in each slot. Firstly, the SFC dynamic orchestration problem is formulated as an integer linear programming (ILP) model based on layered graph. Then, in order to reduce the computation costs, a column generation model is used to simplify the ILP model. Finally, a two-stage heuristic algorithm based on greedy strategy is proposed. Four metrics are defined and the performance of the proposed algorithm is evaluated based on simulation. The results show that our proposal significantly provides more than 30% reduction of run time and about 12% improvement in service deployment success ratio compared to the Viterbi algorithm based mechanism.