• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.2126-2130
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• 2003

In the integrated systems, that is integrated digital TV(DTV) internet and home automation, like home server, is needed integration of digital TV video signal and computer graphic signal. The graphic signal is operating at the high speed and has time-divide-stream. So the re-request of data is not easy at the time of error detection. therefore EDAC algorithm is efficient. In this paper, we show a scheme, that is integration of graphic and dtv format signal for DTV monitor display. This paper also presents the efficiency error detection auto correction(EDAC) for conversion of graphics signal to DTV video signal. A presented EDAC algorithms use the modified hamming code for enhancing video quality and reliability. A EDAC algorithm of this paper can detect single error, double error, triple error and more error for preventing from incorrect correction. And it is not necessary an additional memory. In this paper The comparison between digital TV video signal and graphic signal, a EDAC algorithm and a design of conversion graphic signal to DTV signal with EDAC function in DTV system is described.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.106-109
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• 2002

In the integrated systems, that is integrated digital TV(DTV) internet and home automation, like home server, is needed integration of digital TV video signal and computer graphic signal. The graphic signal is operating at the high speed and has time-divide-stream. So the re-request of data is not easy at the time of error detection. therefore EDAC algorithm is efficient. This paper presents the efficiency error detection auto correction(EDAC) for conversion of graphics signal to DTV video signal. A presented EDAC algorithms use the modified Hamming code for enhancing video quality and reliability. A EDAC algorithm of this paper can detect single error, double error, triple error and more error for preventing from incorrect correction. And it is not necessary an additional memory. In this paper The comparison between digital TV video signal and graphic signal, a EBAC algorithm and a design of conversion graphic signal to DTV signal with EDAC function is described.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.5 no.3
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• pp.592-606
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• 2011

Currently, the development of multimedia communication has progressed so rapidly that the video program service has become a requirement for ordinary customers. The quality of experience (QoE) for the visual signal is of the fundamental importance for numerous image and video processing applications, where the goal of video quality assessment (VQA) is to automatically measure the quality of the visual signal in agreement with the human judgment of the video quality. Considering the codec effect to the video quality, in this paper an efficient non-reference (NR) VQA algorithm is proposed which estimates the video quality (VQ) only by utilizing the distorted video signal at the destination. The VQA feature vectors (FVs) which have high relationships with the subjective quality of the distorted video are investigated, and a hybrid NR VQA (HNRVQA) function is established by considering the multiple FVs. The simulation results, testing on the SDTV programming provided by VCEG Phase I, show that the proposed algorithm can represent the VQ accurately, and it can be used to replace the subjective VQA to measure the quality of the video signal automatically at the destinations.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.10
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• pp.1197-1205
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• 2014

Recently signal transmission of ultra high-definition(4K-UHD) video system is transferred as uncompressed high speed data. However, this has a limit to compose the system because EMI between separate cables of high speed interface section and skew bring distortion of the video signal and jitter. In this paper we applied V-by-One HS interface technique to transfer uncompressed high speed data. We analyzed HSD(High Speed Differential) transmission line signal integrity. Also we applied RF transmission technique instead of UHD video pattern control interface PCB design. When we measured V-by-One HS video signal of designed 4K-UHD class signal generator, We found that the transmission performance has been signal standard.

• ETRI Journal
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• v.38 no.5
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• pp.858-867
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• 2016

A high dynamic range (HDR) video service is an upcoming issue in the broadcasting industry. For compatibility with legacy devices receiving a non-constant luminance (NCL) signal, new tools supporting an HDR video service are required. The current pre-processing chain of HDR video can produce color noise owing to the chroma component down-sampling process for video encoding. Although a luma adjustment method has been proposed to solve this problem, some disadvantages still remain. In this paper, we present an adaptive color noise reduction method for an NCL signal of an HDR video service. The proposed method adjusts the luma component of an NCL signal adaptively according to the information of the luma component from a constant luminance signal and the level of color saturation. Experiment results show that the color noise problem is resolved by applying our proposed method. In addition, the speed of the pre-processing is increased more than two-fold compared to a previous method.

• Journal of Electrical Engineering and information Science
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• v.2 no.5
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• pp.9-16
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• 1997

This paper describes the design of a multistandard video encoder. The proposed encoder accepts conventional NTSC/PAL video signals, It also processes he PAL-plus video signal which is now popular in Europe. The encoder consists of five major building functions which are letter-box converter, color space converter, digital filters, color modulator and timing generator. In order to support multistandard video signals, a programmable systolic architecture is adopted in designing various digital filters. Interpolation digital filters are also used to enhance signal-to-noise ratio of encoded video signals. The input to the encoder can be either YCbCr signal or RGB signal. The outputs re luminance(Y), chrominance(C), and composite video baseband(Y+C) signals. The architecture of the encoder is defined by using Matlab program and is modelled by using Veriflog-HDL language. The overall operation is verified by using various video signals, such as color bar patterns, ramp signals, and so on. The encoder contains 42K gates and is implemented by using 0.6um CMOS process.

• The KIPS Transactions:PartB
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• v.12B no.7 s.103
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• pp.745-754
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• 2005

This paper proposes an information hiding algorithm using channel coding technique which can be used to detect transmission errors and to protect copyright for MPEG-2 video The watermark signal is generated by applying copyright information of video data to a convolutional encoder, and the signal is embedded into macro blocks in every frame while encoding to MPEG-2 video stream In the decoder, the embedded signal is detected from macro blocks in every frame, and the detected signal is used to localize transmission errors in the video stream. The detected signal can also be used to claim ownership of the video data by decoding it to the copyright Information. In this stage, errors in the detected watermark signal can be corrected by channel decoder. The 3 video sequences which consist of 300 frames each are applied to the proposed MPEG-2 codec. Experimental results show that the proposed method can detect transmission errors in the video stream while decoding and it can also reconstruct copyright information more correctly than the conventional method.

• Speech Sciences
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• v.12 no.1
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• pp.135-142
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• 2005

An important aspect of video indexing is the ability to segment video into meaningful segments, i.e., content-based video segmentation. Since the audio signal in the sound track is synchronized with image sequences in the video program, a speech signal in the sound track can be used to segment video into meaningful segments. In this paper, we propose a new approach to content-based video segmentation. This approach uses closed caption to construct a recognition network for speech recognition. Accurate time information for video segmentation is then obtained from the speech recognition process. For the video segmentation experiment for TV news programs, we made 56 video summaries successfully from 57 TV news stories. It demonstrates that the proposed scheme is very promising for content-based video segmentation.

• Journal of the Institute of Convergence Signal Processing
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• v.7 no.1
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• pp.11-16
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• 2006

To manipulate large video databases, effective video indexing and retrieval are required. A large number of video indexing and retrieval algorithms have been presented for frame-w]so user query or video content query whereas a relatively few video sequence matching algorithms have been proposed for video sequence query. In this paper, we propose an efficient algorithm to extract key frames using color histograms and to match the video sequences using edge features. To effectively match video sequences with low computational load, we make use of the key frames extracted by the cumulative measure and the distance between key frames, and compare two sets of key frames using the modified Hausdorff distance. Experimental results with several real sequences show that the proposed video retrieval algorithm using color and edge features yields the higher accuracy and performance than conventional methods such as histogram difference, Euclidean metric, Battachaya distance, and directed divergence methods.

• ETRI Journal
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• v.22 no.1
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• pp.20-29
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• 2000

In this paper, we present a design of video and audio single chip encoder/decoder for portable multimedia application. The single-chip called as video audio signal processor (VASP) consists of a video signal processing block and an audio single processing block. This chip has mixed hardware/software architecture to combine performance and flexibility. We designed the chip by partitioning between video and audio block. The video signal processing block was designed to implement hardware solution of pixel input/output, full pixel motion estimation, half pixel motion estimation, discrete cosine transform, quantization, run length coding, host interface, and 16 bits RISC type internal controller. The audio signal processing block is implemented with software solution using a 16 bits fixed point DSP. This chip contains 142,300 gates, 22 Kbits FIFO, 107 kbits SRAM, and 556 kbits ROM, and the chip size is $9.02mm{\times}9.06mm$ which is fabricated using 0.5 micron 3-layer metal CMOS technology.