• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.4 s.316
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• pp.51-59
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• 2007

In this paper, we propose an efficient hardware architecture for H.264/AVC CAVLC (Context-based Adaptive Variable Length Coding) decoding which used for baseline profile and extended profile. Previous CAVLC architectures are consisted of five step block and each block gets effective bits from Controller block and Accumulator. If large number of non-zero coefficients exist, process for getting effective bits has to iterates many times. In order to reduce this unnecessary process, we propose two techniques, which combine five steps into four steps and reduce process to get efficiency bit by skipping addition step. By adopting these two techniques, the required processing time was reduced about 26% compared with previous architectures. It was designed in a hardware description language and total logic gate count was 16.83k using 0.18um standard cell library.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.8
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• pp.1797-1804
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• 2011

In this paper, I analyzed array organization of MIMO channel antenna and effect of operation environment by evaluating average BER from linear Space-Time Block Code orthogonal design and suggests designing condition of MT antenna for improved BER and the fading index m. To analyze system performance, I used M-PSK and M-QAM modulation, and to use analysis equations I used integrated by Nakagami fading variable, non-integrated Nakagami fading variable. We can get the organization of channel array by using mathematical calculation on matrix. STBE BER performance will decrease as AOA spreading decrease and such loss can be compensated from extending antenna spacing, and changing array organization.

• Journal of Internet Computing and Services
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• v.21 no.3
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• pp.11-19
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• 2020

In this paper, a merged TEA block cipher processor which unifies Tiny Encryption Algorithm(TEA), extended Tiny Encryption Algorithm(XTEA) and corrected block TEA(XXTEA) is designed. After TEA cipher algorithm was first designed, XTEA and XXTEA cipher algorithms were designed to correct security weakness. Three types of cipher algorithm uses a 128-bit master key. The designed cipher processor can encrypt or decrypt 64-bit message block for TEA/XTEA and variable-length message blocks up to 256-bit for XXTEA. The maximum throughput for 64-bit message blocks is 137Mbps and that of 256-bit message blocks is 369Mbps. The merged TEA block cipher designed in this paper has a 16% gain on the area side compared to a lightweight LEA cipher. The cryptographic IP of this paper is applicable in security module of the mobile areas such as smart card, internet banking, and e-commerce.

• Journal of the Institute of Convergence Signal Processing
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• v.9 no.4
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• pp.272-279
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• 2008

Shot change detection is an important technique for effective management of video data, so detection scheme requires adaptive detection techniques to be used actually in various video. In this paper, we propose an adaptive shot change detection algorithm using the mean of feature value on variable reference blocks. Our algorithm determines shot change detection by defining adaptive threshold values with the feature value extracted from video frames and comparing the feature value and the threshold value. We obtained better detection ratio than the conventional methods maximally by 15% in the experiment with the same test sequence. We also had good detection ratio for other several methods of feature extraction and could see realtime operation of shot change detection in the hardware platform with low performance was possible by implementing it in TVUS model of HOMECAST company. Thus, our algerian in the paper can be useful in PMP(portable multimedia player) or other portable players.

• Journal of KIISE:Software and Applications
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• v.32 no.8
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• pp.795-807
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• 2005

The classical approaches for computing Live Variable Analysis(LVA) use iterative algorithms across the entire programs based on the Data Flow Analysis framework. In case of Zephyr compiler, average execution time of LVA takes $7\%$ of the compilation time for the benchmark programs. The classical LVA algorithm has many aspects for improvement. The iterative algorithm for LVA scans useless basic blocks and calculates large sets of variables repeatedly. We propose the improvement of Iterative algorithm for LVA based on used variables' upward movement. Our algorithm produces the same result as the previous iterative algorithm. It is based on use-def chain. Reordering of applying the flow equation in DFA reduces the number of visiting basic blocks and redundant flow equation executions, which improves overall processing time. Experimental results say that our algorithm ran reduce $36.4\%\;of\;LVA\;execution\;time\;and\;2.6\%$ of overall computation time in Zephyr compiler with benchmark programs.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.42 no.3
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• pp.237-242
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• 2014

Surge phenomenon can be occurred in a compressor when the performance of turbofan engine for an aircraft is changed considerably such as take-off phase. This study is aimed to avoid surge phenomenon. This paper propose the PID and Fuzzy control System for the turbofan engine with control inputs, the VIGV(Variable Inlet Guide Vane) in closed loop, and the fuel mass flow in open loop. We design the Dynamic modeling, NPSS S-function, which is connection block of simulink between NPSS(Engine analysis program) and Simulink. Finally, we certify the performance to prevent a serge phenomenon in the VIGV control system using the both methods, PID and fuzzy.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.8C
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• pp.763-770
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• 2006

In this paper, a variable Reed-Solomon(RS) decoder with erasure decoding functionality is designed based on the modified Euclid's algorithm(MEA). The variability of the decoder is implemented through shortening and puncturing based on the RS(124, 108, 8) code, other than the primitive RS(255, 239, 8) code. This leads to shortening the decoding latency. The decoder performs 4-step pipelined operation, where each step is designed to be clocked by an independent clock. Thus by using a faster clock for the MEA block, the complexity and the decoding latency can be reduced. It can support both continuous- and burst-mode decoding. It has been designed in VHDL and synthesized in an FPGA chip, consuming 3,717 logic cells and 2,048-bit memories. The maximum decoding throughput is 33 MByte/sec.

• The Transactions of the Korea Information Processing Society
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• v.2 no.5
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• pp.677-690
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• 1995

In this paper, we propose the high efficiency data compression capable of error control using block-sorting, move to front(MTF) and arithmetic code with variable length in to fixed out. First, the substring with is parsed into length N is shifted one by one symbol. The cyclic shifted rows are sorted in lexicographical order. Second, the MTF technique is applied to get the reference of locality in the sorted substring. Then the preprocessed sequence is coded using VF(variable to fixed) arithmetic code which can be limited the error propagation in one codeword. The key point is how to split the fixed length codeword in proportion to symbol probabilities in VF arithmetic code. We develop the new VF arithmetic coding that split completely the codeword set for arbitrary source alphabet. In addition to, an extended representation for symbol probability is designed by using recursive Gray conversion. The performance of proposed method is compared with other well-known source coding methods with respect to entropy, compression ratio and coding times.

• Journal of KIISE:Software and Applications
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• v.32 no.1
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• pp.22-33
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• 2005

In this paper. we propose an image registration algorithm based on variable-sized blocks of ellipsoidal prototype model which is similar in shape to human face. While matching blocks, the existing cylindrical prototype model which only takes into account left and right curvature can accomplish a correct alignment on left and right images. But, registration errors are produced from up and down images because the cylindrical prototype model not reflects characteristics of head shape and jaw structure of human. The proposed method is a block matching algorithm which uses variable-sized blocks with considering left-right and up-down curvature of ellipsoidal face model and can correctly align images by using the correlation between them. We then adapt image mosaic technique to generate a face texture from aligned images. For this purpose, we stitch them with assigning linear weights according to the overlapped region and remove ghost effects to make more realistic facial texture.

• The KIPS Transactions:PartC
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• v.18C no.5
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• pp.287-292
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• 2011

Using an expanded DES key, we suggest a block cipher algorithm to generate and to use a variable P box. We also present an efficient way for the implementation of variable P box at each round. Using counter examples on Differential Cryptanalysis(DC) and Linear Cryptanalysis(LC), we show that the suggested algorithm is strong enough to overcome those attacks. Compared with the real key bits of triple DES(3DES), the new algorithm is much safer in the points of the exhaustive attack. The results of computer simulations show that the new algorithm is almost 3 times faster than 3DES regarding the cipher process time.