• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.10A
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• pp.1223-1229
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• 2004

A variable-gain low-voltage low noise amplifier MMIC operating at 5GHz frequency band is designed and implemented using the ETRI 0.5$\mu\textrm{m}$ GaAs MESFET library process. This low noise amplifier is designed to have the variable gain for adaptive antenna array combined in HIPERLAN/2. The feedback circuit of a resistor and channel resistance controlled by the gate voltage of enhancement MESFET is proposed for the variable-gain low noise amplifier consisted of cascaded two stages. The fabricated variable gain amplifier exhibits 5.5GHz center frequency, 14.7dB small signal gain, 10.6dB input return loss, 10.7dB output return loss, 14.4dB variable gain, and 2.98dB noise figure at V$\_$DD/=1.5V, V$\_$GGl/=0.4V, and V$\_$GG2/=0.5V. This low noise amplifier also shows-19.7dBm input PldB, -10dBm IIP3, 52.6dB SFDR, and 9.5mW power consumption.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.4
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• pp.318-330
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• 2013

This paper presents a high-linearity low-noise small-size programmable gain amplifier (PGA) based on a new low-noise low-distortion differential amplifier and a proposed reconfiguration technique. The proposed differential amplifier combines an inverter-based differential pair with an adaptive biasing circuit to reduce noise and distortion. The reconfiguration technique saves the chip size by half by utilizing the same differential pair for the input transconductance and load-stage, interchangeably. Fabricated in $0.18-{\mu}m$ CMOS, the proposed PGA shows a dB-linear control range of 21dB in 16 steps from -11 dB to 10 dB with a gain error of less than ${\pm}0.33$ dB, an IIP3 of 7.4~14.5 dBm, a P1dB of -7~1.2 dBm, a noise figure of 13dB, and a 3-dB bandwidth of 270MHz at the maximum gain, respectively. The PGA occupies a chip area of $0.04mm^2$ and consumes only 1.3 mA from the 1.8 V supply.

• Journal of IKEEE
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• v.22 no.2
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• pp.408-412
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• 2018

In this paper, a 26GHz variable gain amplifier fabricated using a 40nm CMOS process is studied. In the case of an automobile radar using 79 GHz, it is advantageous in designing and driving to drive down to a low frequency band or to use a low frequency band before up conversion rather than designing and matching the entire circuit to 79 GHz in terms of frequency characteristics. In the case of a Phased Array System that uses time delay through TTD (True Time Delay) in practice, down conversion to a lower frequency is advantageous in realizing a real time delay and reducing errors. For a VGA (Variable Gain Amplifier) operating in the 26GHz frequency band that is 1/3 of the frequency of 79GHz, VDD : 1V, Bias 0.95V, S11 is designed to be <-9.8dB (Mea. High gain mode) and S22 < (Mea. high gain mode), Gain: 2.69dB (Mea. high gain mode), and P1dB: -15 dBm (Mea. high gain mode). In low gain mode, S11 is <-3.3dB (Mea. Low gain mode), S22 <-8.6dB (Mea. low gain mode), Gain: 0dB (Mea. low gain mode), P1dB: -21dBm (Mea. Low gain mode).

• ETRI Journal
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• v.28 no.4
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• pp.495-501
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• 2006

This paper presents a new CMOS fully-differential second-generation current conveyor (FDCCII). The proposed FDCCII is based on a fully-differential difference transconductor as an input stage and two class AB output stages. Besides the proposed FDCCII circuit operating at a supply voltage of ${\pm}1.5\;V$, it has a total standby current of $380\;{\mu}A$. The applications of the FDCCII to realize a variable gain amplifier, fully-differential integrator, and fully-differential second-order bandpass filter are given. The proposed FDCII and its applications are simulated using CMOS $0.35\;{\mu}m$ technology.

• ETRI Journal
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• v.28 no.1
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• pp.1-8
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• 2006

A novel all-optical gain-controlled (AOGC) bidirectional amplifier is proposed and demonstrated in a compact structure. The AOGC function using fiber Bragg grating (FBG) pairs controls both directional signals independently, and combinations of optical interleavers and isolators suppress Rayleigh backscattering (RB) noise. The amplifier achieves high and constant gain with a wide dynamic input signal range and low noise figure. The performance does not depend on the input signal conditions, whether static-state or transient signals, or whether there is symmetric or asymmetric data traffic on bidirectional transmission. Transmission comparison experiments between invariable symmetrical and random variable asymmetric bidirectional data traffic verify that the all-optical gain control and bidirectional amplification functions are successfully combined into this proposed amplifier.

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.621-624
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• 2003

In this paper, two Cascode Low Noise Variable Gain Amplifiers are proposed for wide dynamic range and constant Noise Figure for frequency range of 2.4GHz. Designed Variable Gain Low Noise Amplifier are for Wireless Local Area Network (WLAN) applications. A gain is higher than 17dB and the noise figure is approximately 1.3dB and the input VSWR is better than 2:1.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.8 no.3
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• pp.83-90
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• 2009

This paper presents the design and measurement of a flight model for a Ku-Band Linearized Channel Amplifier. All MMICs, Variable Gain Amplifier (VGA), Variable Voltage Attenuator ('.IVA), Branch line Coupler and Detector for Pre-distorter are fabricated using a Thin-Film Hybrid process. The performance of the fabricated module is verified through the radio frequency circuit simulation tool and electrical function test in space environment.

• Journal of IKEEE
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• v.23 no.2
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• pp.454-460
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• 2019

In this paper, a watt-level 2.4-GHz RFCMOS linear power amplifier (PA) with pre-distortion method using variable capacitance with respect to input power is demonstrated. The proposed structure is composed of a power detector and a MOS capacitor to improve the linearity of the PA. The pre-distortion based linearizer is embedded in the two-stage PA to compensate for the gain compression in the amplifier stages, it also improves the output P1dB by approximately 1 dB. The simulation results demonstrate a 1-dB gain compression power of 30.81 dBm at 2.4-GHz, and PAE is 29.24 % at the output P1dB point.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.7
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• pp.1303-1310
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• 2016

In this paper, electrocardiogram (ECG) analog front end with supply voltage of 0.5V has been designed and verified by measurements of fabricated chip. ECG is composed of instrument amplifier, 6th order gm-C low pass filter and variable gain amplifier. The instrument amplifier is designed to have gain of 34.8dB and the 6th order gm-C low pass filter is designed to obtain the cutoff frequency of 400Hz. The operational transconductance amplifier of the low pass filter utilizes body-driven differential input stage for low voltage operation. The variable gain amplifier is designed to have gain of 6.1~26.4dB. The electrocardiogram analog front end are fabricated in TSMC $0.18{\mu}m$ CMOS process with chip size of $858{\mu}m{\times}580{\mu}m$. Measurements of the fabricated chip is done not to saturate the gain of ECG by changing the external resistor and measured gain of 28.7dB and cutoff frequency of 0.5 - 630Hz are obtained using the supply voltage of 0.5V.

• Journal of the Optical Society of Korea
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• v.18 no.6
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• pp.657-662
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• 2014

We demonstrate a simulation of a parallel hybrid fiber amplifier in the C+L-band with a gain controlling technique. A variable optical coupler is used to control the input signal power for both EDFA and RFA branches. The gain spectra of the C+L-band are flattened by optimizing the coupling ratio of the input signal power. In order to enhance the pump conversion efficiency, the EDFA branch was pumped by the residual Raman pump power. A gain bandwidth of 60 nm from 1530 nm to 1590 nm is obtained with large input signal power less than -5 dBm. The gain variation is about 1.06 dB at a small input signal power of -30 dBm, and it is reduced to 0.77 dB at the large input signal power of -5 dBm. The experimental results show close agreement with the simulation results.