• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.1
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• pp.37-44
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• 2010

New features of motion compensation, such as variable block size and multiple reference frames are introduced in H.264/AVC. However, these new features induce significant implementation complexity increases. In this paper, an efficient architecture for spiral-type motion estimation is proposed. First, we propose a hardware-friendly spiral search order. Then, an efficient processing element (PE) architecture for ME is proposed to achieve the proposed search order. The improved PE enables one-pixel-move of the reference pixel data to top, bottom, right, and left by four ports for input and output. Moreover, the parallel calculation architecture to calculate all block size with the SAD of 4x4 is introduced in the proposed architecture. As the result of hardware implementation, the hardware cost is about 145k gates. Maximum clock frequency is 134 MHz in the case of FPGA (Xilinx Vertex5) implementation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.7
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• pp.1203-1212
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• 1994

This paper proposes a variable block size vector quantization based on a biorthogonal wavelet transform for image compression. An image is first decomposed with the biorthogonal wavelet transform into multiresolution image and the wavelet coefficients of the middle frequency bands are segmented using the quadtree sturcture to extract the perceptually important regions in the middle frequency bands. A sedges of middle frequency bands exist the corresponding position of high frequency bands, the complicated quadtree structure of middle frequency bands is equally applied to the high frequency bands. Therefore the overhaed information of the quadtree codes needed to segment the high frequency bands can be reduced. The segmented subblocks are encoded with the codebook designed at the each scales and directions. The simulation results showed that the proposed methods could reproduce higher quality image with bit rate reduced about 20(%) than of the preceding VQ method and sufficiently reduce the bolck effect and the edge degradation.

• Proceedings of the IEEK Conference
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• 2001.09a
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• pp.967-970
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• 2001

본 논문에서는 적응 필터의 계수 갱신에서 가변 블록을 사용하는 방법을 제안하였다. 데이터 블록의 길이는 MSE 학습곡선의 시정수에 비례하도록 하였다. 이 방법에서는 적응 필터가 정상상태로 접근함에 따라 스텝사이즈를 조정하여 필터계수 갱신의 횟수를 줄일 수 있다. 제안한 방법의 유용성을 입증하기 위한 컴퓨터모의 실험을 통해 기존의 최적 스텝사이즈 수열을 이용한 알고리듬과 가변 스텝사이즈 알고리듬과 성능을 비교하였다. 그리고 MSE 의 초기값을 최소화하는 최적 초기 스텝사이즈를 유도하였다. 유도된 최적 스텝사이즈를 가변 스텝사이즈 알고리듬에 적용, 그 성능을 평가 하였다.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.4
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• pp.62-76
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• 1994

In this paper, a segmentation-based coding technique as applied to video sequences is proposed. A proposed method separates an image into contour and texture parts, then the visually-sensitive contour part is represented by chain codes and the visually-insensitive texture part is reconstructed by a representative motion vector of a region and mean of the segmented frame difference. It uses a change detector to find moving areas and adopts variable blocks to represent different motions correctly. For better quality of reconstructed images, the displaced frame difference between the original image and the motion compensated image reconstructed by the representative motion vector is segmented. Computer simulation with several video sequences shows that the proposed method gives better performance than the conventional ones in terms of the peak signal to noise ratio(PSNR) and compression ration.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.411-412
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• 2006

In this paper, we proposed a fast algorithm for inter prediction included the most complexity in H.264/AVC. It decide search range according to direction of predicted motion vector, and then perform adaptive candidate spiral search. Simultaneously, it perform motion estimation of variable loop with threshold for variable block size. Conclusively, it is implemented in JM FME with high complexity applying to rate-distortion optimization. Experimental results show that significant complexity reduction is achieved while the degradation in video quality is negligible.

• Progress in Superconductivity and Cryogenics
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• v.8 no.2
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• pp.17-19
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• 2006

A novel clock distribution technique for pipelined-RSFQ logics using variable Bias Currents of JTLs as delay-medium is newly proposed. RSFQ logics consist of several logic gates or blocks connected in a pipeline structure. And each block has variable delay difference. In the structure, this clock distribution method generates a set of clock signals for each logic blocks with suitable corresponding delays. These delays, in the order of few to tens of pS, can be adjusted through controlling bias current of JTL of delay medium. While delays with resistor value and JJ size are fixed at fabrication stage, delay through bias current can be controlled externally, and thus, is heavily investigated for its range as well as correct operation within current margin. Possible ways of a standard delay library with modular structure are sought for further modularizing Pipelined-RSFQ applications. Simulations and verifications are done through WRSpice with Hypres 3-um process parameters.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.635-638
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• 2002

Blowfish is a symmetric block cipher that can be used as a drop-in replacement fur DES or IDEA. It takes a variable-length key, from 32bit to 448bit, making it ideal for both domestic and exportable use. This paper is somewhere middle-of-the-line, where this paper made significant tradeoffs between speed, size and ease of implementation. The main focus was to make an implementation that was usable, moderately compact, and would still run at an acceptable clock speed. For the real time process of blowfish, it is required that high-speed operation and small size hardware. So, A structure of new adders constructed in this study has all advantages abstracted from other adders. As for this new adder, area cost increases by 1.06 times and operation speed increases by 1.42 times.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.10C
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• pp.1036-1043
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• 2005

In this paper, we propose a sequential motion vector recovery algorithm for H.264 video coding standard. Motion vectors of H.264 video coding standard cover relatively smaller areas than other standard, since motion estimation of H.264 takes place in the fashion of variable block size. Therefore, the correlation of motion vectors between neighboring blocks increases as the block size of motion estimation is lowered. Under the framework of sequential recovery, we introduce a motion vector recovery using $\alpha$-trimed mean filter. Experimental results show that proposed algorithm is useful in real time video delivery .with nearly comparable or better visual quality than previous approaches such as macro block boundary matching and Lagrage interpolation.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.2 s.314
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• pp.1-11
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• 2007

H.264/AVC uses variable block sizes to achieve significant coding gain. It has 7 different coding modes having different motion compensation block sizes in Inter slice, and 2 different intra prediction modes in Intra slice. This fine-tuned new coding feature has achieved far more significant coding gain compared with previous video coding standards. However, extremely high computational complexity is required when rate-distortion optimization (RDO) algorithm is used. This computational complexity is a major problem in implementing real-time H.264/AVC encoder on computationally constrained devices. Therefore, there is a clear need for complexity reduction algorithm of H.264/AVC such as fast mode decision. In this paper, we propose a fast mode decision with early $P8\times8$ mode rejection based on block size activity using large block history map (LBHM). Simulation results show that without any meaningful degradation, the proposed method reduces whole encoding time on average by 53%. Also the hybrid usage of the proposed method and the early SKIP mode decision in H.264/AVC reference model reduces whole encoding time by 63% on average.

• The Transactions of the Korea Information Processing Society
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• v.7 no.8
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• pp.2543-2554
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• 2000

Packet schedulers for real-time communication must provide bounded delay and efficient use of network resources such as bandwidth, buffers and so on. In order to satisfy them, a large number of packet scheduling methods have been proposed. Among packet scheduling methods, an EDF (Earliest Deadline First) scheduling is the optimal one for a bounded delay service. A disadvantage of EDF scheduling is that queued packets must be sorted according to their deadlines, requiring a search operation whenever a new packet arrives at the scheduler. Although an RPQ (Rotating Priority Queue) scheduler, requiring large size of buffers, does not use such operation, it can closely approximate the schedulability of an EDF scheduler. To overcome the buffer size problem of an RPQ scheduler, this paper proposes a new scheduler named MRPQ (Multiple Rotating Priority Queue). In a MRPQ scheduler, there are several layers with a set of Queues. In a layer, Queues are configured by using a new strategy named block Queue. A MRPQ scheduler needs nearly half of buffer size required in an RPQ scheduler and produces schedulability as good as an RPQ scheduler.