• 한국진공학회지
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• 제18권6호
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• pp.453-458
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• 2009

SiOC 박막을 BTMSM과 산소의 혼합가스를 사용하여 CVD 방법으로 증착하였다. 박막의 특성은 가스 유량비에 따라서 변하였다. 유전상수는 MIS 구조를 이용하여 C-V 측정법에 의하여 얻었다. 결합의 말단을 구성하는 Si-$CH_3$ 결합 사이의 공간효과에 의해서 기공이 만들어지며, 기공의 형성에 의해서 박막의 두께가 증가하였다. 그러나 분극의 감소에 의해서 만들어지는 SiOC 박막은 두께가 감소하면서 유전상수도 감소되었다. 열처리 후 유전상수는 수산기의 기화에 의해서 감소되었다. 박막의 두께는 분극의 감소에 의한 유전상수의 감소와 연관이 있었다. 굴절률은 박막의 두께에 반비례하는 경향성이 있으며, 박막의 두께와 굴절률의 경향성은 열처리 후에도 변하지 않았다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.652-652
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• 2013

The conventional thermal chemical vapor deposition (CVD) setup for the graphene synthesis has mainly used convective heat transfer in order to heat a catalyst (e.g. Cu) up to $1,000^{\circ}C$. Although the conventional CVD has been so far widely accepted as the most appropriate candidate enabling mass-production of high-quality graphene, this method has stillremained under the standard for the commercialization largely due to the poor productivity arisen out of the required long processing time. Here, we introduced a fast and efficient synthetic route toward CVD-graphene. Unlike the conventional CVD using convection heat transfer, we adopted a CVD setup utilizing conduction heat transfer between Cu catalyst and rapid heating source. The high thermal conductive nature of Cu and the employed rapid heating source led to the remarkable reduction in processing timeas compared to the conventional convection based CVD (Fig. 1A), moreover, the synthesized graphene was turned out to have comparable quality to that synthesized by the conventional CVD (Fig. 1B). For the optimization of the conduction based CVD process, the parametric studies were thoroughly performed using through Raman spectroscopy and electrical sheet resistance measurement. Our approach is thought to be worth considerable in order to enhance productivity of the CVD graphene in the industry.

• JSTS:Journal of Semiconductor Technology and Science
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• 제2권2호
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• pp.93-101
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• 2002

We have proposed and fabricated two lateral type field emission diodes, poly-Si emitter by utilizing the local oxidation of silicon (LOCOS) and GaN emitter using metal organic chemical vapor deposition (MOCVD) process. The fabricated poly-Si diode exhibited excellent electrical characteristics such as a very low turn-on voltage of 2 V and a high emission current of $300{\;}\bu\textrm{A}/tip$ at the anode-to-cathode voltage of 25 V. These superior field emission characteristics was speculated as a result of strong surface modification inducing a quasi-negative electron affinity and the increase of emitting sites due to local sharp protrusions by an appropriate activation treatment. In respect, two kinds of procedures were proposed for the fabrication of the lateral type GaN emitter: a selective etching method with electron cyclotron resonance-reactive ion etching (ECR-RIE) or a simple selective growth by utilizing $Si_3N_4$ film as a masking layer. The fabricated device using the ECR-RIE exhibited electrical characteristics such as a turn-on voltage of 35 V for $7\bu\textrm{m}$ gap and an emission current of~580 nA/l0tips at anode-to-cathode voltage of 100 V. These new field emission characteristics of GaN tips are believed to be due to a low electron affinity as well as the shorter inter-electrode distance. Compared to lateral type GaN field emission diode using ECR-RIE, re-grown GaN emitters shows sharper shape tips and shorter inter-electrode distance.

• Carbon letters
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• 제12권4호
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• pp.207-217
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• 2011

We discuss the influence of few-walled carbon nanotubes (FWCNTs) treated with nitric acid and/or sulfuric acid on field emission characteristics. FWCNTs/tetraethyl orthosilicate (TEOS) thin film field emitters were fabricated by a spray method using FWCNTs/TEOS sol one-component solution onto indium tin oxide (ITO) glass. After thermal curing, they were found tightly adhered to the ITO glass, and after an activation process by a taping method, numerous FWCNTs were aligned preferentially in the vertical direction. Pristine FWCNT/TEOS-based field emitters revealed higher current density, lower turn-on field, and a higher field enhancement factor than the oxidized FWCNTs-based field emitters. However, the unstable dispersion of pristine FWCNT in TEOS/N,N-dimethylformamide solution was not applicable to the field emitter fabrication using a spray method. Although the field emitter of nitric acid-treated FWCNT showed slightly lower field emission characteristics, this could be improved by the introduction of metal nanoparticles or resistive layer coating. Thus, we can conclude that our spray method using nitric acid-treated FWCNT could be useful for fabricating a field emitter and offers several advantages compared to previously reported techniques such as chemical vapor deposition and screen printing.

• 한국세라믹학회지
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• 제52권6호
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• pp.441-448
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• 2015

Silicon carbide (SiC) coatings for tri-isotropic (TRISO) nuclear fuel particles were fabricated using a chemical vapor deposition (CVD) process onto graphite. A micro-tensile-testing system was developed for the mechanical characterization of SiC coatings at high temperatures. The fracture strength of the SiC coatings was characterized by the developed micro-tensile test in the range of $25^{\circ}C$ to $1000^{\circ}C$. Two types of CVD-SiC films were prepared for the micro-tensile test. SiC-A exhibited a large grain size (0.4 ~ 0.6 m) and the [111] preferred orientation, while SiC-B had a small grain size (0.2 ~ 0.3 mm) and the [220] preferred orientation. Free silicon (Si) was co-deposited onto SiC-B, and stacking faults also existed in the SiC-B structure. The fracture strengths of the CVD-SiC coatings, as measured by the high-temperature micro-tensile test, decreased with the testing temperature. The high-temperature fracture strengths of CVD-SiC coatings were related to the microstructure and defects of the CVD-SiC coatings.

• 한국세라믹학회지
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• 제39권2호
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• pp.171-177
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• 2002

본 연구에서는 DC bias가 인가된 유도결합형 플라즈마 열선 화학기상증착법을 이용하여 580$^{\circ}C$의 저온에서 탄소나노튜브를 수직 배향시켰다. 성장된 탄소나노튜브의 기판으로는 강화유리 위에 촉매층으로 Ni과 전도층으로 Cr을 300/200 ${\AA}$(Ni/Cr) 증착된 것으로 R-F magnetron sputtering을 이용하여 제작하였다. 성장 시 RF power와 DC bias power는 150W와 80W이며 텅스텐 필라멘트 power는 7∼8 A로 인가하였다. 성장된 탄소나노튜브는 속이 비어 있는 다중벽으로 이루어 졌으며 성장된 탄소나노튜브 끝단에는 금속 촉매로 보이는 Ni이 존재하는 것을 알 수 있었다. 탄소나노튜브는 흑연화도가 우수하며 그에 따라 탄소나노튜브의 전계 방출 특성도 우수하게 평가되었다. 성장된 탄소나노튜브의 구동 전압은 약 3 V/${\mu}m$이었다.

• 한국결정성장학회:학술대회논문집
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• 한국결정성장학회 1996년도 The 9th KACG Technical Annual Meeting and the 3rd Korea-Japan EMGS (Electronic Materials Growth Symposium)
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• pp.422-448
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• 1996

Low-temperature epitaxial growth of Si and SiGe layers of Si is one of the important processes for the fabrication of the high-speed Si-based heterostructure devices such as heterojunction bipolar transistors. Low-temperature growth ensures the abrupt compositional and doping concentration profiles for future novel devices. Especially in SiGe epitaxy, low-temperature growth is a prerequisite for two-dimensional growth mode for the growth of thin, uniform layers. UHV-ECRCVD is a new growth technique for Si and SiGe epilayers and it is possible to grow epilayers at even lower temperatures than conventional CVD's. SiH and GeH and dopant gases are dissociated by an ECR plasma in an ultrahigh vacuum growth chamber. In situ hydrogen plasma cleaning of the Si native oxide before the epitaxial growth is successfully developed in UHV-ECRCVD. Structural quality of the epilayers are examined by reflection high energy electron diffraction, transmission electron microscopy, Nomarski microscope and atomic force microscope. Device-quality Si and SiGe epilayers are successfully grown at temperatures lower than 600℃ after proper optimization of process parameters such as temperature, total pressure, partial pressures of input gases, plasma power, and substrate dc bias. Dopant incorporation and activation for B in Si and SiGe are studied by secondary ion mass spectrometry and spreading resistance profilometry. Silicon p-n homojunction diodes are fabricated from in situ doped Si layers. I-V characteristics of the diodes shows that the ideality factor is 1.2, implying that the low-temperature silicon epilayers grown by UHV-ECRCVD is truly of device-quality.

• 한국결정성장학회지
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• 제19권6호
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• pp.298-304
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• 2009

고온 열수송시스템용 구조재료인 Inconel 617의 표면 처리에 따른 고온물성 개선에 대한 연구를 수행하였다. 표면처리 방법으로는 Inconel 617 기판 상에 급속가열(RTP) 및 수열처리를 통한 균질산화물 형성과 물리적 기상증착법(Arc discharge)법에 의한 TiAlN(두께 약 $2{\mu}m$ 박막 코팅을 적용하였다. 불균질 산화물($Cr_2O_3$) 형성 억제에 미치는 표면처리의 효과 및 표면 미세구조가 물성에 미치는 영향에 대해 알아보기 위해 표면처리된 Inconel 617 시편들을 $1000^{\circ}C$, 대기중에서 열처리 하였으며, 열처리된 시편들에 대해 고온 상형성 및 미세구조를 비교 분석하였다. RTP와 수열처리를 통한 표면산화물 형성보다는 TiAlN 박막 증착을 통한 보호피막의 형성이 Inconel 617 표면에서 생성되는 불균일 $Cr_2O_3$ 막의 성장을 효과적으로 억제할 수 있어서 더 균질한 미세구조와 가장 우수한 내마모 특성을 나타내었다.

• Transactions on Electrical and Electronic Materials
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• 제8권3호
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• pp.110-114
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• 2007

Dependence of the thermal stability of nickel silicide on the film stress of inter layer dielectric (ILD) layer has been investigated in this study and silicon nitride $(Si_3N_4)$ layer is used as an ILD layer. Nickel silicide was formed with a one-step rapid thermal process at $500^{\circ}C$ for 30 sec. $2000{\AA}$ thick $Si_3N_4$ layer was deposited using plasma enhanced chemical vapor deposition after the formation of Ni silicide and its stress was split from compressive stress to tensile stress by controlling the power of power sources. Stress level of each stress type was also split for thorough analysis. It is found that the thermal stability of nickel silicide strongly depends on the stress type as well as the stress level induced by the $Si_3N_4$ layer. In the case of high compressive stress, silicide agglomeration and its phase transformation from the low-resistivity nickel mono-silicide to the high-resistivity nickel di-silicide are retarded, and hence the thermal stability is obviously improved a lot. However, in the case of high tensile stress, the thermal stability shows the worst case among the stressed cases.

• 전자공학회논문지A
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• 제31A권7호
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• pp.85-94
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• 1994

A high-resolution transmission electron microscopy study of the solid phase crystallization of the amorphous silicon thin films, deposited on SiOS12T at 52$0^{\circ}C$ by low pressure chemical vapor deposition and annealed at 55$0^{\circ}C$ in a dry N$_{2}$ ambient was carried out so that the arrangement of atoms in the crystalline silicon and at the amorphous/crystalline interface of the growing grains could be understood on an atomic level. Results show that circular crystalline silicon nuclei have formed and then the grains grow to an elliptical or dendritic shape. In the interior of all the grains many twins whose{111} coherent boundaries are parallel to the long axes of the grains are observed. From this result, it is concluded that the twins enhance the preferential grain growth in the <112> direction along {111} twin planes. In addition to the twins. many defect such as intrinsic stacking faults, extrinsic stacking faults, and Shockley partial dislocations, which can be formed by the errors in the stacking sequence or by the dissociation of the perfect dislocation are found in the silicon grain. But neither frank partial dislocations which can be formed by the condensation of excess silicon atoms or vacancies and can form stacking fault nor perfect dislocations which can be formed by the plastic deformation are observed. So it is concluded that most defects in the silicon grain are formed by the errors in the stacking sequence during the crystallization process of the amorphous silicon thin films.