• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.6
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• pp.546-550
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• 2013

We propose a novel negative differential resistance (NDR) device with ultra-high peak-to-valley current ratio (PVCR) by combining pn junction diode with depletion mode nanowire (NW) transistor, which suppress the valley current with transistor off-leakage level. Band-to-band tunneling (BTBT) Esaki diode with degenerately doped pn junction can provide multiple switching behavior having multi-peak and valley currents. These multiple NDR characteristics can be controlled by doping concentration of tunnel diode and threshold voltage of NW transistor. By designing our NDR device, PVCR can be over $10^4$ at low operation voltage of 0.5 V in a single peak and valley current.

• Journal of Industrial Technology
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• v.31 no.A
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• pp.103-107
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• 2011

In this paper, a method is proposed to improve power factor and the input current THD in LED driver circuit. The researched circuit consists of a valley-fill circuit and boosting inductor and a Buck converter. Valley-fill circuit is a passive PFC and simplified structure, the buck converter is operated with current feedback. The switching frequency is 50KHz in LED driver circuit and LED forward current is constant. A valley-fill type PFC circuit for LED driver(15Watt) has been implemented, and the validity of proposed method is shown by is simulation and experimental result.

• Journal of the Semiconductor & Display Technology
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• v.17 no.3
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• pp.21-26
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• 2018

In this paper, the switching characteristics of the active clamp type flyback converter, which is deemed suitable for the miniaturization of the external power supply for home appliance, were analyzed and the process of reducing the switching loss was explained. The active clamp type flyback converter operating in the DCM has confirmed that the surge voltage of the main switch does not occur and the turn-off / on loss of the switch do not occur in principle. Also, in the case of the switch for synchronous rectifier, it was showed that the switch current showed half-wave rectified sinusoidal characteristic, and the switching loss was reduced. The switching characteristics of the experimental results gathered from 120 W class prototype were compared with the theoretical waveform in the steady-state and it was confirmed that the power conversion efficiency of the active clamp type flyback converter was maintained high due to the reduction of the switching loss.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.22 no.1
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• pp.87-94
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• 2008

A method for improving current THD of Valley-fill rectifier is proposed in this paper. The proposed topology combines a boosting inductor with Valley-fill rectifier which carry out AC/DC conversion and PFC simultaneously The boosting effect by PWM switching makes low THD current and improve of Valley-fill rectifier. The operation modes and THD of input current are analyzed as applied the boosting inductor, and the optimum value of boosting inductor is determined A 100[W] single-stage converter has been designed and tested. Experimental results are resented to verify the validity of the proposed method.

• Journal of Power Electronics
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• v.16 no.2
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• pp.498-511
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• 2016

This paper presents a single-phase five-level inverter controlled by two novel pulse width modulation (PWM) switching techniques. The proposed PWM techniques are designed based on minimum switching power loss and minimum total harmonic distortion (THD). In a single-phase five-level inverter employing six switches, the first proposed PWM technique requires four switches to operate at switching frequency and two other switches to operate at line frequency. The second proposed PWM technique requires only two switches to operate at switching frequency and the rest of the switches to operate at line frequency. Compared with conventional PWM techniques for single-phase five-level inverters, the proposed PWM techniques offer high efficiency and low harmonic components in the output voltage. The validity of the proposed PWM switching techniques in controlling single-phase five-level inverters to regulate load voltage is verified experimentally using a 100 V, 500 W laboratory prototype controlled by dspace 1103.

• The Transactions of the Korean Institute of Power Electronics
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• v.28 no.1
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• pp.48-58
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• 2023

This paper presents the digital control techniques of a bidirectional CRM(critical-conduction mode) buck(boost) converter, a dead-time design method that optimizes ZVS(zero-voltage switching) and valley-switching operation, and a switching-frequency limitation that ensures stable converter operation. To verify the feasibility of the design, a Si-MOSFET-based bidirectional CRM buck(boost) converter is built with 260-430 V input, 160-240 V output, and 1.0 kW rated capacity. The bidirectional CRM converter achieves an efficiency of up to 99.6% at buck mode and 98.7% at boost mode under rated load conditions.

• The Journal of the Korea institute of electronic communication sciences
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• v.7 no.3
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• pp.485-490
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• 2012

In this paper, driver circuit of LED lights for ships is designed and implemented to replace conventional lights with filament which have short life time due to vibration of ships. The driver of LED module is switching circuit without transformer to reduce volume and cost. As switch circuit controls input 220 VAC with PWM, LED module is reliably driven. Power factor is improved by using valley-fill PFC compensation circuit which is handled to pulse current of switching circuit. Serial-parallel LED circuit is applied to reduce change period of lights of long-term navigation ships. Array of serial-parallel can operate even if some of LEDs is damaged. It is suitable for ships that power consumption and power factor of lights including developed drive circuit have 39Watt and 0.925 respectively.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.98-103
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• 2001

In case that electronic ballast employing a valley-fill passive power factor correction (PFC) circuit is used for feeding fluorescent lamps, a new method to reduce crest factor of the lamp current is studied in this paper. In order to reduce crest factor to lower value, a pulse frequency modulation technique based on the waveform of the dc-link voltage which is predetermined by the passive PFC circuit, is taken into the switching control action of the electronic ballast. An equation-based analysis between the crest factor of lamp current and the effect of varying the inverter switching frequency is comprehensively performed.

• Journal of the Semiconductor & Display Technology
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• v.20 no.3
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• pp.157-160
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• 2021

In this paper, a 20W class multi-output QR flyback converter for auxiliary power supply was designed to stabilize 4 output voltages, and the efficiency and load characteristics were compared and analyzed. It was checked if each output affects other output characteristics through experiment. As a result, the experimental circuit reached a high efficiency of 82.5% or more at a load power of over 20W, and the maximum power loss was 2.6W. Consequently, it was confirmed that all of 4 output voltages of the multi-output QR flyback converter constructed in this paper were stabilized within 0.5% in full-load range, and each output was independently controlled in an electrically isolated state.

• Journal of Power Electronics
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• v.16 no.1
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• pp.227-237
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• 2016

A novel digital current control strategy for digitally controlled DC-DC switching converters, referred to as Adjacent Cycle Sampling (ACS), is proposed in this paper. For the ACS current control strategy, the available time interval from sampling the current to updating the duty ratio, is approximately one switching cycle. In addition, it is independent of the duty ratio. As a result, the contradiction between the processing speed of the hardware and the transient response speed can be effectively relaxed by using the ACS current control strategy. For digitally controlled buck DC-DC switching converters with trailing-edge modulation, digital current control algorithms with the ACS control strategy are derived for three different control objectives. These objectives are the valley, average, and peak inductor currents. In addition, the sub-harmonic oscillations of the above current control algorithms are analyzed and eliminated by using the digital slope compensation (DSC) method. Experimental results based on a FPGA are given, which verify the theoretical analysis results very well. It can be concluded that the ACS control has a faster transient response speed than the time delay control, and that its requirements for hardware processing speed can be reduced when compared with the deadbeat control. Therefore, it promises to be one of the key technologies for high-frequency DC-DC switching converters.