• Title/Summary/Keyword: VDCOL

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Jeju 80kV HVDC Controller Modeling Using PSCAD/EMTDC Program (PSCAD/EMTDC 프로그램을 이용한 제주 80kV HVDC 제어기 모델링)

  • Choi, Soon-Ho;Lee, Seong-Doo;Kim, Chan-Ki
    • The Transactions of the Korean Institute of Power Electronics
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    • v.16 no.6
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    • pp.533-541
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    • 2011
  • This paper studies modeling of Jeju 80kV HVDC system and its controller by using PSCAD/EMTDC program. Reduced ac network is applied to verify interaction between ac network and dc system. Design parameter is applied to the converter transformer, harmonic filter and dc transmisstion line to simulate dc system. HVDC controller is divided into a rectifier controller and a inverter controller according to the converter operating mode. The inverter controller is composed of current control, voltage control and extingtion angle control. The rectifier controller is composed of current control and voltage control. Both controller has VDCOL characteristics so that current order is dependant on voltage variation. Step response, ac network single phase fault, three phase fault is simulated to verify the dynamic performance of controller model in both transient state and steady state.

HVDC Controller Design Using PSCAD/EMTDC Program (PSCAD/EMTDC 프로그램을 이용한 HVDC 제어기 설계)

  • Choi, Soon-Ho;Kim, Chan-Ki;Kim, Jae-Han;Kim, Jin-Young
    • Proceedings of the KIPE Conference
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    • 2011.11a
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    • pp.295-296
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    • 2011
  • 본 논문에서는 PSCAD/EMTDC 프로그램을 통해 HVDC 제어기를 설계하였다. HVDC 제어기는 컨버터의 운전모드에 따라서 인버터 제어기와 정류기 제어기로 나뉘며, 인버터 제어기는 전류제어기, 전압제어기, 소호각 제어기로 구현하고, 정류기 제어기는 전류제어기 및 전압제어기로 구현하였다. HVDC V-I 특성곡선에 VDCOL을 적용하여 전압에 따른 전류의 의존 특성을 반영하였다. ac 계통 단상 지락 고장, 3상 지락 고장에 대해 시뮬레이션하여 설계한 제어기의 정상상태 및 과도상태시 응답성능을 검증하였다.

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A STUDY ON SOLUTION AGAINST CORE SATURATION INSTABILITY AT AN HVDC CONVERTER

  • Yang Byeong-Mo;Kim Chan-Ki
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.591-599
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    • 2001
  • The paper identifies a severe form of core saturation instability in an DC/AC interaction system. It then seeks solutions to the problem by HVDC control means. This is achieved by a proper design of the Voltage Dependent Current Order Limiter (VDCOL), the Current Regulator and Timing Pulse generator. Supplementary control loops have also been introduced to result in a satisfactory performance as compared to that obtained one with the use of uncharacteristic harmonic filter on the AC side. Robustness of all the options has been demonstrated through recovery performance of the DC link in response to both I-phase and 3-phase 5 cycle faults on both rectifier and inverter commutating buses.

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Control Strategy of MMC-HVDC under Unbalanced Grid Voltage Conditions

  • Zhang, Jianpo;Zhao, Chengyong
    • Journal of Power Electronics
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    • v.15 no.6
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    • pp.1499-1507
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    • 2015
  • High voltage direct current transmission based on modular multilevel converter (MMC-HVDC) is one of the most promising power transmission technologies. In this study, the mathematical characteristics of MMC-HVDC are analyzed in a synchronous rotational reference frame. A hybrid current vector controller based on proportional integer plus resonant is used to uniformly control the DC and double-base frequency AC currents under unbalanced grid voltage conditions. A corresponding voltage dependent current order limiter is then designed to solve the overcurrent problems that may occur. Moreover, the circulating current sequence components are thoroughly examined and controlled using a developed circulating current suppressor. Simulation results verify the correctness and effectiveness of the proposed control schemes.

A Study on Solution against Core Saturation Instability at HVDC Converter

  • Yang, Byeong-Mo;Kim, Chan-Ki;Koh, Bong-Eun;Moon, Young-Hyun
    • Journal of Power Electronics
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    • v.2 no.4
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    • pp.297-304
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    • 2002
  • The paper identifies a severe form of core saturation instability in a DC/AC interaction system. It then seeks solutions to the problem by HVDC control means. This is achieved by a proper design of the Voltage Dependent Current Order Limiter (VDCOL), the Current Regulate. and Timing Pulse generator. Supplementary control loops have also been introduced to result in a satisfactory performance as compared to that obtained one with the use of uncharacteristic harmonic filter on the AC side. All the options have been demonstrated through recovery performance of the DC link in response to both 1-phase and 3-phase 5 cycle faults on both rectifier and inverter commutating buses.