• Journal of the Korean Home Economics Association
• /
• v.8 no.1
• /
• pp.87-92
• /
• 1970

Recently it has become a common belief that ascorbic acid comes to break up in the process of making its color after peeling it. In this study the writer has attempted to observe whethier ascorbc acid really breaks up or not, what percentage of salt is needed in water to keep ascorbic acid in the best condition. Ascorbic acid was quantified by the spectrophotometric method. The results were obtained as follows; It seems that ascorbic acid does not break up considerably in mixing by the imxer for two minutes and if the mixing lasts longer ascorbic acid breaks up by heat and presumably by enzyme and oxidation. Generally at our home the breaking of ascorbic acid usually does not appear so much as only two minutes, mixing gives us the desirable result.

• Journal of Advanced Navigation Technology
• /
• v.10 no.2
• /
• pp.138-144
• /
• 2006

In this paper, dual mode FET mixer for WiBro and wireless LAN(WLAN) applications has been designed in the form of dual gate FET mixer by using the cascode structure of two single gate pHEMTs. The designed dual gate mixer has been optimized to have variable conversion gain for WiBro and WLAN applications in order to save dc power consumption. The LO to RF isolation of the designed mixer is more than 20dB from 2.3GHz to 2.5GHz band. With the LO power of 0dBm and RF power of -50dBm, the mixer shows 15dB conversion gain. When RF power increases from -50dBm to -20dBm, the conversion gain decreases to -2dB from 15dB with bias change. The variable conversion gain has several advantages. It can reduce the high dynamic range requirement of AGC burden at IF stage. Also, it can save the dc power dissipation of mixer up to 90%.

• Proceedings of the KSME Conference
• /
• 2008.11b
• /
• pp.2495-2500
• /
• 2008

We simulated the mixing characteristics in micro T-channel using Lattice Boltzmann Method. We studied the relation a mixing length and pressure-drop due to inlet and outlet ration in Reynolds number 0.5, Peclet number 500 and Schmidt 1000. The ratio of a down-inlet to up-inlet was $0.5{\sim}1.5$ times, up-inlet to outlet was $1{\sim}3$ times and outlet length was 250 times to up-inlet. The mixing length decrease linearly as outlet ratio decreased, and pressure-drip increase non-linearly. Initial stage of micro channel mixture was fast by down-inlet ratio, however, the mixing length is not influence.

• ETRI Journal
• /
• v.36 no.6
• /
• pp.924-930
• /
• 2014

This paper presents a $0.13{\mu}m$ CMOS 3-level envelope delta-sigma modulation (EDSM) RF signal generator, which synthesizes a 2.6 GHz-centered fully symmetrical 3-level EDSM signal for high-efficiency power amplifier architectures. It consists of an I-Q phase modulator, a Class B wideband buffer, an up-conversion mixer, a D2S, and a Class AB wideband drive amplifier. To preserve fast phase transition in the 3-state envelope level, the wideband buffer has an RLC load and the driver amplifier uses a second-order BPF as its load to provide enough bandwidth. To achieve an accurate 3-state envelope level in the up-mixer output, the LO bias level is optimized. The I-Q phase modulator adopts a modified quadrature passive mixer topology and mitigates the I-Q crosstalk problem using a 50% duty cycle in LO clocks. The fabricated chip provides an average output power of -1.5 dBm and an error vector magnitude (EVM) of 3.89% for 3GPP LTE 64 QAM input signals with a channel bandwidth of 10/20 MHz, as well as consuming 60 mW for both channels from a 1.2 V/2.5 V supply voltage.

• ETRI Journal
• /
• v.30 no.2
• /
• pp.249-254
• /
• 2008

In this paper, we demonstrate an electrically band-limited carrier-suppressed return-to-zero (EB-CSRZ) signal generator operating up to a 10 Gbps data rate comprising a single-stage Mach-Zehnder modulator and a wideband signal mixer. The wideband signal mixer comprises inverter stages, a mixing stage, and a gain amplifier. It is implemented by using a 0.13 ${\mu}m$ CMOS technology. Its transmission response shows a frequency range from DC to 6.4 GHz, and the isolation response between data and clock signals is about 21 dB at 6.4 GHz. Experimental results show optical spectral narrowing due to incorporating an electrical band-limiting filter and some waveform distortion due to bandwidth limitation by the filter. At 10 Gbps transmission, the chromatic dispersion tolerance of the EB-CSRZ signal is better than that of NRZ-modulated signal in single-mode fiber.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
• /
• 2003.11a
• /
• pp.630-637
• /
• 2003

In this paper, a DBM(double balanced mixer) of 2 GHz is implemented on FR4(h=1.6mm, ${\epsilon}_r=4.6$) substrate. The structure of double balanced mixer requires, in general, two talons and a quad diode. For balun, a novel planar balun using microstrip to CPS(Coplanar Strip) is suggested and designed. The suggested balun shows the phase imbalance of $180^{\circ}{\pm}1.5^{\circ}$ and the amplitude imbalance of ${\pm}0.2 dB$ for 1.5 to 2.5 GHz. Using the balun, DBM is successfully implemented, and the measured conversion loss of up/down converter show about 6 dB over the bandwidth. The balun may be applicable for MMIC(Monolithic Microwave Integrated Circuit) DBM with the process supporting backside via though more study.

• Journal of electromagnetic engineering and science
• /
• v.3 no.2
• /
• pp.86-90
• /
• 2003

A flat conversion loss in microwave mixer is hard to achieve if integrating with an image rejection filter(IRF). This is due to the change of termination condition with respect to the LO and IF frequency at RF port where the filter has 50 ohm termination property only in the RF band. This paper describes a flatness maintenance in the down mixer concerning a diode matching condition as well as an electrical length of embedding line at RF port. The implemented single balance diode mixer is suitable for a 23 ㎓ European Terrestrial Radio. RF, LO and fixed IF frequency chosen in this paper are 21.2∼22.4 ㎓, 22.4∼23.6 ㎓ and 1.2 ㎓, respectively. The measured results show a conversion loss of 8.5 ㏈, flatness of 1.2 ㏈ p-p, input P1㏈ of 7㏈m, IIP3 of 15.42 ㏈m with nominal LO power level of 10㏈m. The return loss of RF and LO port are less than - 15 ㏈ and - 12 ㏈, respectively and IF port is less than - 6 ㏈. LO/RF and LO/IF isolation are 18 ㏈ and 50 ㏈, respectively. This approach would be a helpful reference for designing up/down converter possessing a filtering element.

• Journal of Radiation Industry
• /
• v.9 no.3
• /
• pp.131-135
• /
• 2015

The flow characteristics of fluid were measured using radioactive tracer in pilot scale digester with tray motion mixer. In consideration of the detection volume of the detector and the size of the digester, 20 detectors were installed in the digester. The radioactive tracer eluted 8 mCi of $^{68}Ga$ from $^{68}Ge/^{68}Ga$ generator was injected into the digester bottom. After radiotracer injection, the flow pattern was measured on the basis of the initial movement of the tracer until its diffusion completely. Most of tracer moved to the wall along the bottom of the digester, and then rose along the wall. The other tracer moved up along the mixer, and then moved to the wall direction along the surface.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.30 no.4A
• /
• pp.350-357
• /
• 2005

DSRC provides high speed radio link between Road Side Equipment and On-Board Equipment within the narrow communication area. In this paper, a 5.8 GHz up-conversion mixer for DSRC communication system was designed and fabricated using 0.8 m SiGe HBT process technology and IF/LO/RF matching circuits, IF/LO input balun circuits, and RP output balun circuit were all integrated on chip. The chip size of fabricated mixer was $2.7mm\times1.6mm$ and the measured performance was 3.5 dB conversion gain, -12.5 dBm output IP3, 42 dB LO to If isolation, 38 dB LO to RF isolation, current consumption of 29 mA for 3.0 V supply voltage.

• 한국정보통신설비학회:학술대회논문집
• /
• 2008.08a
• /
• pp.89-92
• /
• 2008

CMOS 기반의 고주파 집적회로에서는 높은 이득과 출력을 얻기 위하여 인덕터와 같은 수동소자를 사용한다. 그러나 수동소자를 사용하게 되면 넓은 면적을 차지하기 때문에 회로의 크기를 증가시키는 단점을 갖는다. 본 논문에서는 PMOS 를 기반으로 구현한 active inductor 를 적용하여 회로의 면적을 줄일 수 있으며, 기존의 주파수 변환기와 동등한 선형 특성을 갖는 상향 주파수 변환기를 설계하였다. 인덕터를 적용한 상향 주파수 변환기의 OIP3 ($3^{rd}$ Output Intercept Point)는 1.3 dBm 을 가지며, 제안한 상향 주파수 변환기의 OIP3 는 0.8 dBm 으로 동등한 선형 특성을 보이며, layout 상에서 회로의 면적을 40 % 이상 감소하는 특성의 선형 송신기용 주파수 변환기를 설계 분석하였다.