• Title/Summary/Keyword: Ultra-high speed metal deposition

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The development of ultra high-speed metal film deposition system and process technology for a heat sink in digital devices (디지털 소자용 방열판 제작을 위한 초고속 금속필름 증착장치 및 공정기술 개발)

  • Yoon, Hyo Eun;Ahn, Seong Joon;Han, Dong Hwan;Ahn, Seungjoon
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.18 no.7
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    • pp.17-25
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    • 2017
  • To resolve the problem of the temperature rise in LED or OLED lighting, until now a thick metal film has been used as a heat-sink. Conventionally, this thick metal film is made by the electroplating method and used as the heat-dissipating plate of the electronic devices. However, nowadays there is increasing need for a Cu metal film with a thickness of several hundred micrometers that can be formed by the dry deposition method. In this work, we designed and fabricated a Cu film deposition system where the heating element is separated from the ceramic crucible, which makes ultra-rapid deposition possible by preventing heat loss. In addition, the resulting induction heating also contributes to the high deposition rate. By tuning the various parameters, we obtained a $100-{\mu}m$ thick Cu film whose heat conductivity is high and whose thickness uniformity is better than 2%, while the deposition rate is as high as $1000{\AA}/s$.

Study of Via-Typed Air-Gap for Logic Devices Applications below 45 nm Node

  • Kim, Sang-Yong;Kim, Il-Soo;Jeong, Woo-Yang
    • Transactions on Electrical and Electronic Materials
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    • v.12 no.4
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    • pp.131-134
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    • 2011
  • Back-end-of-line using ultra low-k (ULK; k < 2.5) has been required to reduce resistive capacitance beyond 45 nmtechnologies, because micro-processing units need higher speed and density. There are two strategies to manufacture ULK inter-layer dielectric (ILD) materials using an air-gap (k = 1). The former ULK and calcinations of ILD degrade the mechanical strength and induce a high cost due to the complication of following process, such as chemical mechanical polishing and deposition of the barrier metal. In contrast, the air-gap based low-k ILD with a relatively higher density has been researched on the trench-type with activity, but it has limited application to high density devices due to its high air-gap into the next metal layer. The height of air-gap into the next metal layer was reduced by changing to the via-typed air-gap, up to about 50% compared to that of the trench-typed air-gap. The controllable ULK was easily fabricated using the via-typed air-gap. It is thought that the via-type air-gap made the better design margin like via-patterning in the area with the dense and narrow lines.

Cu Metallization for Giga Level Devices Using Electrodeposition (전해 도금을 이용한 기가급 소자용 구리배선 공정)

  • Kim, Soo-Kil;Kang, Min-Cheol;Koo, Hyo-Chol;Cho, Sung-Ki;Kim, Jae-Jeong;Yeo, Jong-Kee
    • Journal of the Korean Electrochemical Society
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    • v.10 no.2
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    • pp.94-103
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    • 2007
  • The transition of interconnection metal from aluminum alloy to copper has been introduced to meet the requirements of high speed, ultra-large scale integration, and high reliability of the semiconductor device. Since copper, which has low electrical resistivity and high resistance to degradation, has different electrical and material characteristics compared to aluminum alloy, new related materials and processes are needed to successfully fabricate the copper interconnection. In this review, some important factors of multilevel copper damascene process have been surveyed such as diffusion barrier, seed layer, organic additives for bottom-up electro/electroless deposition, chemical mechanical polishing, and capping layer to introduce the related issues and recent research trends on them.