• Title/Summary/Keyword: ULSI

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Time Dependence of Charge Generation and Breakdown of Re-oxidized Nitrided Oxide (재산화 질화 산화막의 전하 생성과 항복에 대한 시간 의존성)

  • 이정석;이용재
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.2 no.3
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    • pp.431-437
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    • 1998
  • In this paper, we have investigated the electrical properties of ultra-thin nitrided oxide(NO) and re-oxidized nitrided oxide(ONO) films that are considered to be promising candidates for replacing conventional silicon dioxide film in ULSI level integration. Especially, we have studied a variation of I-V characteristics, gate voltage shift, and time-dependent dielectric breakdown(TDDB) of thin layer NO and ONO film depending on nitridation and reoxidation time, respectively, and measured a variation of leakage current and charge-to-breakdown(Q$\_bd$) of optimized NO and ONO film depending on ambient temperature, and then compared with the properties of conventional SIO$\_2$. From the results, we find that these NO and ONO thin films are strongly influenced by process time and the optimized ONO film shows superior dielectric characteristics, and (Q$\_bd$) performance over the NO film and SIO$\_2$, while maintaining a similar electric field dependence compared with NO layer.

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Preparation and Characteristics of PLT(28) Thin Film Using Sol-Gel Method (Sol-Gel 법을 이용한 PLT(28) 박막의 제작과 특성)

  • Kang, Seong-Jun;Joung, Yang-Hee;Yoo, Jae-Hung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.2
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    • pp.865-868
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    • 2005
  • We fabricated the $Pb_{0.72}La_{0.28}TiO_3 (PLT(28))$ thin film successfully by using the sol-gel method and characterized it to evaluate its potential for being utilized as the capacitor dielectrics of ULSI DRAMs. In our sol-gel process, the acetates were used as the starting materials. Through the TGA-DTA analysis, we established the excellent fabrication conditions of the sol-gel method for the PLT(28) thin film. We obtained the dense and crack-free PLT(28) thin film of 100% perovskite phase by drying at 350$^{\circ}C$ after each coating and final annealing at 650$^{\circ}C$. Electrical properties of PLT(28) thin film were measured through formation on the Pt/Ti/SiO$_2$/Si substrate and its dielectric constant and leakage current density were measured as 936 and 1.1${\mu}$A/cm$^2$, respectively

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Tungsten Silicide ($WSi_2$) for Alternate Gate Metal in Metal-Oxide-Semiconductor (MOS) Devices (금속-산화막-반도체 소자에서 대체 게이트 금속인 텅스텐 실리사이드의 특성 분석)

  • 노관종;윤선필;양성우;노용한
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.64-67
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    • 2000
  • Tungsten silicide(WSi$_2$) is proposed for the alternate gate electrode of ULSI MOS devices. Good structural property and low resistivity of WSi$_2$ deposited by a low pressure chemical vapor deposition(LPCVD) method directly on SiO$_2$ is obtained after annealing. Especially, WSi$_2$-SiO2 interface remains flat after annealing tungsten silicide at high temperature. Electrical characteristics of annealed WSi$_2$-SiO$_2$-Si(MOS) capacitors were improved in view of charge trapping.

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Scanning Capacitance Microscope by Stage Driving (스테이지 구동방식 주사형정전용량 현미경)

  • Kim Eung Kyeu
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.7
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    • pp.101-107
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    • 1994
  • In this work a scanning capacitance microscopy(SCaM) by stage driving is proposed and presented some of the experimental results.SCaM is a microscope which scans a surface of materials mechanically in two or two point five dimensions by a capacitance probe with a few tenth $\mu\textrm{m}$ ize tip, and display images of the surface shape or capacitive distribution. The present target of the SCaM is 0.1$\mu\textrm{m}$ resolution power which exceeds that of optical microscope. This will become a powerful tool for inspecting ULSI pattern etched by X-ray biological data etc. The experimental system is composed based on a VHD video disk which captures the capacitance changes of the video disk surface and converts it into video signal.

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Annealing effects of CMP slurry abrasives (CMP 슬러리 연마제의 어닐링 효과)

  • Park, Chang-Jun;Jeong, So-Young;Kim, Chul-Bok;Choi, Woon-Shik;Seo, Yong-Jin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.05d
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    • pp.105-108
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    • 2003
  • CMP(chemical mechanical polishing) process has been attracted as an essential technology of multi-level interconnection. However, the COO(cost of ownership) is very high, because of high consumable cost. Especially, among the consumables, slurry dominates more than 40 %. So, we focused how to reduce the consumption of raw slurry. In this paper, We have studied the CMP (chemical mechanical polishing) characteristics of slurry by adding of raw alumina abrasive and annealed alumina abrasive. As a experimental results, we obtained the comparable slurry characteristics compared with original silica slurry in the view point of high removal rate and low non-uniformity. Therefore, we can reduce the cost of consumables(COC) of CMP process for ULSI applications.

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Dependency of Planarization Efficiency on Crystal Characteristic of Abrasives in Nano Ceria Slurry for Shallow Trench Isolation Chemical Mechanical Polishing (STI CMP용 나노 세리아 슬러리에서 연마입자의 결정특성에 따른 평탄화 효율의 의존성)

  • Kang, Hyun-Goo;Takeo Katoh;Kim, Sung-Jun;Ungyu Paik;Park, Jea-Gun
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2003.11a
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    • pp.65-65
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    • 2003
  • Chemical mechanical polishing (CMP) is one of the most important processes in recent ULSI (Ultra Large Scale Integrated Circuit) manufacturing technology. Recently, ceria slurries with surfactant have recently been used in STI-CMP,[1] became they have high oxide-to-nitride removal selectivity and widen the processing margin The role of the abrasives, however, on the effect of planarization on STI-CMP is not yet clear. In this study, we investigated how the crystal characteristic affects the planarization efficiency of wafer surface with controlling crystallite size and poly crystalline abrasive size independently.

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The Effects of Dielectric Passivation Overlayers for Submicron Thin Film Metallizations of ULSI Semiconductor Devices (초고집적 Submicron 박막금속화를 위한 Dielectric Overlayer의 Passivation 효과)

  • 김대일;김진영
    • Journal of the Korean Vacuum Society
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    • v.3 no.1
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    • pp.59-64
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    • 1994
  • 극소전자 디바이스의 고집적화와 더불어 박막배선의 선폭은 0.5$\mu$m이하까지 축소되며 초고집적 submicron 박막금속화가 진행되고 있다. 미세회로에 적용되어지는 배선재료는 인가되는 고전류밀도로 인하여 electromigration 에 의한 결함이 쉽게 발생한다는 단점이있다. 금속박막 전도체위의 dielectric overlayer는 electromigration 에 대한 passivation 효과를 보여 극소전자 디바이스의 평균수명을 향상시 킨다.본 연구에서는 박막금속화에서 dielectric overlayer의 passivation 효과를 알아보기 위하여 약 3000 $\AA$ 두께의 Al,Al-1%Si, Ag 그리고 Cu 박막배선위에 증착하여 SiO2절연보호막의 유무에 따른 박막배선 의 수명변화 및 신뢰도를 측정하였다. 박막배선에 인가된 전류밀도는 1x106 A/cm2와 1x107 A/cm2 이었다. SiO2 dielectric overlayer는 Al,Al-1%Si Ag. Cu 박막배선에서는 electromigration에 대한 보호막 혀과를 보이며 평균수명을 모두 향상시킨다. SiO2 passivation 효과는 Al, Ag, Cu 박막중 Cu 박막배선에서 가 장 크게 나타났다. SiO2 dielectric overlayer가 형성되지 않은 경우 Al 박막배선의 수명이 가장 긴 것으 로 나타났으나 SiO2 가 형성된 경우는 Cu 박막배선의 수명이 가장 길게 나타났다.

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Preparaton of ECR MOCVD $SrTiO_3$ thin films and their application to a Gbit-scale DRAM stacked capacitor structure

  • Lesaicherre, P-Y.
    • Journal of the Korean Vacuum Society
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    • v.4 no.S1
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    • pp.138-144
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    • 1995
  • It is commonly believed that high permittivity materials will be necessary for future high density Gbit DRAMs. In a first part, we explain the choice of SrTiO3 by ECR MOCVD for Gbit-scale DRAMs. In a second part, after describing the ECR MOCVD system and presenting the requirements SrTiO3 thin films should meet for use in Gbit-scale DRAMs, the physical and electrical properties of srTiO3 thi film prepared by ECR MOCVD are then studied. A stacked capacitor technology, suitable for use in 1 Gbit DRAM, and comprising high permittivity SrTiO3 thin films prepared by ECR MOCVD at $450^{\circ}C$ on electron beam and RIE patterned RuO2/TiN storage nodes is finally described.

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Monte-Carlo Simulation of Focused ton Beam Lithography (집속 이온빔 리소그라피의 몬데칼로 전산 모사)

  • 이현용;정홍배
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1993.11a
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    • pp.134-136
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    • 1993
  • Microelectronic fabrication technology .is based on the use of lithsgraphy to create small linewidths and patterns that make up ULSI. In previous papers, we discussed the theoretically calculated values such as ion range, ion concentration,ion transmission coefficient and the defocused ion beam-induced characteristics in a-Se$_{75}$Ge$_{25}$. In this paper, the typical Monte Carlo (MC) simulation results and p개cedures for the focused ion beam lithography were presented. The interaction and scattering of ions with the resist depend on the beam energy, impact parameter arid resist parameters. For ion exposure simulations, the quantity of interest is the spatial distribution of energy deposited by ions in the resist due to interaction phenomena with resist ions.s.s.

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A Study on the Oxide CMP Characteristics of using Mixed Abrasive Slurry(MAS) (혼합 연마제 슬러리를 이용한 Oxide CMP 특성에 관한 연구)

  • Lee, Sung-Il;Park, Sung-Woo;Lee, Woo-Sun;Seo, Yong-Jin
    • Proceedings of the KIEE Conference
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    • 2006.07a
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    • pp.601-602
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    • 2006
  • Chemical mechanical polishing (CMP) technology has been widely used for global planarization of multi-level interconnection for ULSI applications. However, the cost of ownership and cost of consumables are relatively high because of expensive slurry. In this paper, we studied the mixed abrasive slurry(MAS). In order to save the costs of slurry, the original silica slurry was diluted by de-ionized water (DIW). And then, $ZrO_2$,$CeO_2$, and $MnO_2$ abrasives were added in the diluted slurry in order to promote the mechanical force of diluted slurry. We have also investigate the possibility of mixed abrasive slurry for the oxide CMP application.

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