• Journal of the Optical Society of Korea
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• v.14 no.4
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• pp.420-423
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• 2010

We fabricated 1 mm-thick periodically-poled lithium niobate (PPLN) crystals by using a high-voltage amplifier for standard electric field poling combined with a voltage multiplier. Furthermore, two 1 mm-thick PPLNs were directly bonded to make a 2 mm-thick PPLN. The large aperture allowed broad angular tuning, and a broad spectral range of quasi-phase matched second-harmonic generation can be achieved in a single channel. High-power applications are also expected.

• 전기의세계
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• v.30 no.6
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• pp.375-385
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• 1981

New algorithms are derived for nonlinear programming problems which are characterized by their large variables and equality and inequality constraints. The algorithms are based upon the introduction of the Dependent-Variable-Elimination method, Independent-Variable-Reduction method, Optimally-Ordered-Triangular-Factorization method, Equality-Inequality-Sequential-Satisfaction method, etc. For a case study problem relating to the optimal determination of load flow in a 10-bus, 13-line sample power system, several approaches are undertaken, such as SUMT, Lagrange's Multiplier method, sequential applications of linear and quadratic programming method. For applying the linear programming method, the conventional simplex algorithm is modified to the large-system-oriented one by the introduction of the Two-Phase method and Variable-Upper-Bounding method, thus resulting in remarkable savings in memory requirements and computing time. The case study shows the validity and effectivity of the algorithms presented herein.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.10 no.4
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• pp.81-93
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• 2000

In a methodological approach to improve the processing performance of modulo exponentiation which is the primary arithmetic in RSA crypto algorithm, we present a new RSA hardware architecture based on high-radix modulo multiplication and CRT(Chinese Remainder Theorem). By implementing the modulo multiplier using radix-16 arithmetic, we reduced the number of PE(Processing Element)s by quarter comparing to the binary arithmetic scheme. This leads to having the number of clock cycles and the delay of pipelining flip-flops be reduced by quarter respectively. Because the receiver knows p and q, factors of N, it is possible to apply the CRT to the decryption process. To use CRT, we made two s/2-bit multipliers operating in parallel at decryption, which accomplished 4 times faster performance than when not using the CRT. In encryption phase, the two s/2-bit multipliers can be connected to make a s-bit linear multiplier for the s-bit arithmetic operation. We limited the encryption exponent size up to 17-bit to maintain high speed, We implemented a linear array modulo multiplier by projecting horizontally the DG of Montgomery algorithm. The H/W proposed here performs encryption with 15Mbps bit-rate and decryption with 1.22Mbps, when estimated with reference to Samsung 0.5um CMOS Standard Cell Library, which is the fastest among the publications at present.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.10 no.6
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• pp.732-742
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• 1998

Prediction method for heat transfer coefficients in a horizontal smooth tube with forced convection condensation is proposed. In this paper, the analogy between momentum and heat transfer was applied to an annular flow regime and the logarithmic velocity distribution is applied to describe the velocity profile within the liquid film. Prediction results are compared with those of experimental ones. The test refrigerants are R113, R22, R134a, R407C(R33/R125/R134a, 23/25/52 wt%), R410A(R32/R125, 50/50 wt%) and R134a＋R123(R134a/R123, 85.5/14.5 wt%) which are used under operating conditions in a condenser of air-conditioner. The proposed prediction method shows good agreement with experimental data within$\pm 30%$ for pure refrigerants. For the mixture refrigerants including the ternary mixture refrigerant R407C, condensation heat transfer from this study are higher than those from experiments. By correcting the constant in two-phase frictional multiplier, the predicated heat transfer coefficients become similar to the experimental results.

• Geophysics and Geophysical Exploration
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• v.24 no.4
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• pp.180-193
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• 2021

The complex resistivity method is an exploration technique that can obtain various characteristic information of underground media by measuring resistivity and phase in the frequency domain, and its utilization has recently increased. In this paper, a three-dimensional inversion algorithm for the CR data was developed to increase the utilization of this method. The Poisson equation, which can be applied when the electromagnetic coupling effect is ignored, was applied to the modeling, and the inversion algorithm was developed by modifying the existing algorithm by adopting comlex variables. In order to increase the stability of the inversion, a technique was introduced to automatically adjust the Lagrangian multiplier according to the ratio of the error vector and the model update vector. Furthermore, to compensate for the loss of data due to noisy phase data, a two-step inversion method that conducts inversion iterations using only resistivity data in the beginning and both of resistivity and phase data in the second half was developed. As a result of the experiment for the synthetic data, stable inversion results were obtained, and the validity to real data was also confirmed by applying the developed 3D inversion algorithm to the analysis of field data acquired near a hydrothermal mine.

• Nuclear Engineering and Technology
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• v.55 no.1
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• pp.109-118
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• 2023

In this paper, the evaluation method of fluidelastic instability (FEI) of newly designed steam generator tubing in pressurized water reactor (PWR) nuclear power plants is discussed. To obtain the parameters for prediction of the critical velocity of FEI for steam generator tubes, experimental research is carried out, and the design parameters are determined. Using CFD numerical simulation, the tube array scale of the model experiment is determined, and the experimental device is designed. In this paper, 7 groups of experiments with void fractions of 0% (water), 10%, 20%, 50%, 75%, 85% and 95% were carried out. The critical damping ration, fundamental frequency and critical velocity of FEI of tubes in flowing water were measured. Through calculation, the total mass and instability constant of the immersed tube are obtained. The critical damping ration measured in the experiment mainly included two-phase damping and viscous damping, which changed with the change in void fraction from 1.56% to 4.34%. This value can be used in the steam generator design described in this paper and is conservative. By introducing the multiplier of frequency and square root of total mass per unit length, it is found that the difference between the experimental results and the calculated results is less than 1%, which proves the rationality and feasibility of the calculation method of frequency and total mass per unit length in engineering design. Through calculation, the instability constant is greater than 4 when the void fraction is less than 75%, less than 4 when the void fraction exceeds 75% and only 3.04 when the void fraction is 95%.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.10
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• pp.758-765
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• 2018

This paper presents a 24-GHz frequency-modulated continuous wave(FMCW) radar transceiver with two Rx and one Tx channels in 65-nm complementary metal-oxide-semiconductor(CMOS) process and implemented it on a radar system using the developed transceiver chip. The transceiver chip includes a $14{\times}$ frequency multiplier, low-noise amplifier, down-conversion mixer, and power amplifier(PA). The transmitter achieves >10 dBm output power from 23.8 to 24.36 GHz and the phase noise is -97.3 GHz/Hz at a 1-MHz offset. The receiver achieves 25.2 dB conversion gain and output $P_{1dB}$ of -31.7 dBm. The transceiver consumes 295 mW of power and occupies an area of $1.63{\times}1.6mm^2$. The radar system is fabricated on a low-loss Duroid printed circuit board(PCB) stacked on the low-cost FR4 PCBs. The chip and antenna are placed on the Duroid PCB with interconnects and bias, gain blocks and FMCW signal-generating circuitry are mounted on the FR4 PCB. The transmit antenna is a $4{\times}4$ patch array with 14.76 dBi gain and receiving antennas are two $4{\times}2$ patch antennas with a gain of 11.77 dBi. The operation of the radar is evaluated and confirmed by detecting the range and azimuthal angle of the corner reflectors.