• Journal of KIISE:Computing Practices and Letters
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• v.14 no.4
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• pp.378-388
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• 2008

Flash memory has been attracting attention as the next mass storage media for mobile computing systems such as notebook computers and UMPC(Ultra Mobile PC)s due to its low power consumption, high shock and vibration resistance, and small size. A storage system with flash memory excels in random read, sequential read, and sequential write. However, it comes short in random write because of flash memory's physical inability to overwrite data, unless first erased. To overcome this shortcoming, we propose an SSD(Solid State Disk) architecture with two novel features. First, we utilize non-volatile FRAM(Ferroelectric RAM) in conjunction with NAND flash memory, and produce a synergy of FRAM's fast access speed and ability to overwrite, and NAND flash memory's low and affordable price. Second, the architecture categorizes host write requests into small random writes and large sequential writes, and processes them with two different buffer management, optimized for each type of write request. This scheme has been implemented into an SSD prototype and evaluated with a standard PC environment benchmark. The result reveals that our architecture outperforms conventional HDD and other commercial SSDs by more than three times in the throughput for random access workloads.

• Journal of Digital Contents Society
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• v.14 no.2
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• pp.215-222
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• 2013

NAND flash memory-based Solid State Drives (SSD) have lots of merits compared to traditional hard disk drives (HDD). However, random write in SSD is still far slower than sequential read/write and random read. There are two independent approaches to resolve this problem: 1) using part of the flash memory blocks as log blocks, and 2) using internal write buffer (DRAM or Non-Volatile RAM) in SSD. While log blocks are managed by the Flash Translation Layer (FTL), write buffer management has been treated separately from FTL. Write buffer management schemes did not use the exact status of log blocks and log block management schemes in FTL did not consider the behavior of write buffer management scheme. In this paper, we first show that log blocks and write buffer have a tight relationship to each other, which necessitates integrated management of both of them. Since log blocks also can be viewed as another type of write buffer, we can manage both of them as an integrated write buffer. Then we provide three design criteria for the integrated write buffer management scheme which can be very useful to SSD firmware designers.

• The KIPS Transactions:PartA
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• v.15A no.6
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• pp.335-344
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• 2008

We propose an adaptive garbage collection technique for hybrid flash memory which has both SLC and MLC. Since SLC area is fast and MLC area has low cost, the proposed scheme utilizes the SLC area as log buffer and the MLC area as data block. Considering the high write cost of MLC flash, the garbage collection for the SLC log buffer moves a page into the MLC data block only when the page is cold or the page migration invokes a small cost. The other pages are moved within the SLC log buffer. Also it adjusts the parameter values which determine the operation of garbage collection adaptively considering I/O pattern. From the experiments, we can know that the proposed scheme provides better performance compared with the previous flash management schemes for the hybrid flash and finds the parameter values of garbage collection close to the optimal values.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.43 no.6 s.312
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• pp.43-51
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• 2006

This paper proposes a metrics for example matching under the example-based machine translation for English-Korean machine translation. Our metrics served as similarity measure is based on edit-distance algorithm, and it is employed to retrieve the most similar example sentences to a given query. Basically it makes use of simple information such as lemma and part-of-speech information of typographically mismatched words. Edit-distance algorithm cannot fully reflect the context of matched word units. In other words, only if matched word units are ordered, it is considered that the contribution of full matching context to similarity is identical to that of partial matching context for the sequence of words in which mismatching word units are intervened. To overcome this drawback, we propose the context-weighting scheme that uses the contiguity information of matched word units to catch the full context. To change the edit-distance metrics representing dissimilarity to similarity metrics, to apply this context-weighted metrics to the example matching problem and also to rank by similarity, we normalize it. In addition, we generalize previous methods using some linguistic information to one representative system. In order to verify the correctness of the proposed context-weighted metrics, we carry out the experiment to compare it with generalized previous methods.

• Proceedings of the Korean Information Science Society Conference
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• 2007.06c
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• pp.69-74
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• 2007

플래시 메모리는 하드디스크와 다른 물리적 특성을 가지고 있다. 대표적으로 덮어쓰기가 되지 않고 데이터를 읽고 쓰는 단위와 지우는 단위가 서로 다르다. 이러한 물리적 제약을 소프트웨어적으로 보완해주기 위해서 플래시 메모리를 사용하는 시스템에서는 대부분 Flash Translation Layer (FTL)을 사용한다. 지금까지 FTL 알고리즘의 대부분이 임의 쓰기 패턴보다 순차 쓰기 패턴에 훨씬 더 효율적으로 작용한다. 그러나 B-트리와 같은 자료구조에서는 일반적으로 순차 쓰기 패턴 보다는 임의 쓰기 패턴이 발생된다. 따라서 플래시 메모리상에서 B-트리를 관리할 경우 FTL에 비효율적인 쓰기 패턴을 생성하게 된다. 본 논문에서는 플래시 메모리상에서 B-트리와 같은 자료구조를 효율적으로 저장 관리하기 위한 새로운 방식을 제안한다. 새로운 방식은 B-트리에서 발생되는 임의 쓰기를 플래시 메모리상의 버퍼를 이용하여 FTL에 효율적인 순차 쓰기를 발생시킨다. 실험 결과, 본 논문에서 제안하는 방식은 기존의 방식보다 플래시 메모리에서 발생되는 쓰기 및 블록소거 연산 횟수를 60%이상 감소시킨다.

• Proceedings of the Korean Information Science Society Conference
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• 2008.06a
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• pp.329-330
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• 2008

• Proceedings of the Korean Information Science Society Conference
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• 2011.06a
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• pp.555-558
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• 2011

하드웨어의 발전으로 인하여 한 머신에 장착되는 물리 메모리의 크기가 점차로 커지고 있으며, 가상화 기술과 같은 서버 통합 워크로드가 일반화됨에 따라 개별 응용프로그램의 working set size 또한 증가하고 있다. 하지만 가상주소에 대한 물리주소 변환의 cache인 TLB(Translation Look-aside Buffer)의 커버리지는 물리 메모리 크기가 커짐에 따라 점차 줄어들어 TLB miss가 발생하여 메모리 접근이 느려질 가능성이 더욱 높아지고 있다. 본 논문에서는 계층적 비트맵을 사용하는 TLB 표현 방법을 이용하여 TLB 커버리지를 높이는 하드웨어적인 기법을 제안하고, 이에 적합한 운영체제 기법을 제안한다.

• Transactions on Control, Automation and Systems Engineering
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• v.1 no.1
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• pp.62-68
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• 1999

FCM(Fuzzy Cognitive Map) is proposed for representing causal reasoning. Its structure allows systematic causal reasoning through a forward inference. Authors have already proposed a diagnostic system based on FCM to utilized to identify the true origin of fault by on-line pattern diagnosis. In FCM based fault diagnosis, Temporal Associative Memories (TAM) recall of FCM is utilized to identify the true origin of fault by on-line pattern match where predicted pattern sequences obtained from TAM recall of fault FCM models are compared with actually observed ones. In engineering processes, the propagation delays are induced by the dynamics of processes and may vary with variables involved. However, disregarding such propagation delays in FCM-based fault diagnosis may lead to erroneous diagnostic results. To solve the problem, a concept of FTCM(Fuzzy Time Cognitive Map) is introduced into FCM-based fault diagnosis in this work. Expecially, translation method of FTCM makes it possible to diagnose the fault for some discrete time. Simulation studies through two-tank system is carried out to verify the effectiveness of the proposed diagnostic scheme.

• Proceedings of the Korean Society of Computer Information Conference
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• 2011.01a
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• pp.25-28
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• 2011

본 논문에서는 스마트폰과 같은 모바일 단말기 자체에서 동작하는 경량화된 영한 하이브리드 모바일 번역 엔진을 설계 및 구현하였다. 번역 엔진은 자연스러운 번역과 높은 번역 품질을 위해 번역 메모리(Translation Memory)와 규칙기반의 번역 엔진으로 이중화를 하였다. PC에 비해 하드웨어 제약이 심한 스마트폰 자체에서 구동이 원활하도록 주메모리의 사용을 줄이고 분석 시간 단축을 위하여 핵심 번역 엔진을 포함한 번역 지식 DB가 외장메모리에서 구동되도록 하였다. 실험결과 번역 품질은 BLEU와 NIST 평가치를 기준으로 서버 기반의 구글번역기 대비 70.0%로 사용자의 의미전달이 가능한 실용적인 수준으로 평가되었다.

• Development and Reproduction
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• v.19 no.2
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• pp.61-67
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• 2015

The immediate early gene c-fos has long been known as a molecular marker of neural activity. The neuron's activity is transformed into intracellular calcium influx through NMDA receptors and L-type voltage sensitive calcium channels. For the transcription of c-fos, neural activity should be strong enough to activate mitogen-activated protein kinase (MAPK) signaling pathway which shows low calcium sensitivity. Upon translation, the auto-inhibition by Fos protein regulates basal Fos expression. The pattern of external stimuli and the valence of the stimulus to the animal change Fos signal, thus the signal reflects learning and memory aspects. Understanding the features of multiple components regulating Fos signaling is necessary for the optimal generation and interpretation of Fos signal.