• Proceedings of the KIPE Conference
• /
• 2014.07a
• /
• pp.120-121
• /
• 2014

장거리 이송이 가능한 선형동기 전동기 구조를 제안하고, 수학적 모델링을 하였으며, PI제어기를 포함하는 제어알고리즘을 제안하여, 실험으로 그 결과를 확인하였다. 추진제어기의 출력은 Park's, Clake's Transformation을 이용하여 코일을 구동하는 전류 명령을 발생시켰으며 개별 코일을 독립적으로 구동하는 아날로그 전류제어기를 OP-Amp로 구현하였다. 실험결과는 속도 오차는 4 ~ 10% 이하의 결과를 얻었다.

• 한국신재생에너지학회:학술대회논문집
• /
• 2006.06a
• /
• pp.134-137
• /
• 2006

The equipment of PV system is composed of PV Modules, inverters, DC combiner boxes, transformer protective equipment etc,. And, These equipment be combined Power transformation, Monitoring, Protect ive function The primary concern in designing any PV system is the determination of its optimum size and combination.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.7 no.2
• /
• pp.205-213
• /
• 2002

This paper deals with the implementation of three-phase VSI systems which can control the power regenerated from DC bus line to AC supply. The overall system consists of the line-to-line voltage and line current sensors, an actual power calculator using d-q transformation method, a complex power controller with PI control scheme, a gating signal generator for modified ｑ-conduction mode, a DPLL for frequency followup, and Power circuits. Control board is constructed by using a 32-bit DSP TMS32C32, two EFLDs , six ADCs, and a DAC. To verify the performance of the proposed system, we designed and constructed the propotype with the power rating of 5kVA at AC 220V. Experimental results show that the regenerated active power is well controlled to its command vague and the regenerated reactive power still remained at nearly zero through all operating modes.

• Proceedings of the KIEE Conference
• /
• 1996.07a
• /
• pp.262-264
• /
• 1996

This paper presents a new dual loop control using novel vector phase locked loop(VP-PLL) for a high power static var compensator(SVC) with three-level GTO voltage source inverter(VSI). Through circuit DQ-transformation, a simple dq-axis equivalent circuit is obtained. From this, DC analysis is carried out to obtain maximum controllable phase angle ${\alpha}_{max}$ per unit current between the three phase source and the switching function of inverter, and AC open-loop transfer function is given. Because ${\alpha}_{max}$ becomes small in high power SVC, this paper proposes VP-PLL for more accurate $\alpha$-control. As a result, the overall control loop has dual loop structure, which consists of inner VP-PLL for synchronizing the phase angle with source and outer Q-loop for compensating reactive power of load. Finally, the validity of the proposed control method is verified through the experimental results.

• Journal of Power Electronics
• /
• v.16 no.4
• /
• pp.1375-1386
• /
• 2016

To decouple the secondary saliencies in sensorless permanent magnet synchronous machine (PMSM) drives, a repetitive control (RC) in the angle domain is proposed. In this paper, the inductance model of a concentrated windings surface-mounted PMSM (cwSPMSM) with strong secondary saliencies is developed. Due to the secondary saliencies, the estimated position contains harmonic disturbances that are periodic relative to the angular position. Through a transformation from the time domain to the angle domain, these varying frequency disturbances can be treated as constant periodic disturbances. The proposed angle-domain RC is plugged into an existing phase-locked loop (PLL) and utilizes the error of the PLL to generate signals to suppress these periodic disturbances. A stability analysis and parameter design guidelines of the RC are addressed in detail. Finally, the proposed method is carried out on a cwSPMSM drive test-bench. The effectiveness and accuracy are verified by experimental results.

• The Transactions of the Korean Institute of Electrical Engineers P
• /
• v.60 no.2
• /
• pp.76-81
• /
• 2011

Power system frequency is the main index of power quality indicating an abnormal state and disturbances of systems. The nominal frequency is deviated by sudden change in generation and load or faults. Power system is used as frequency relay to detection for off-nominal frequency operation and connecting a generator to an electrical system, and V/F relay to detection for an over-excitation condition. Under these circumstances, power system should maintain the nominal frequency. And frequency and frequency deviation should accurately measure and quickly estimate by frequency measurement device. The well-known classical method, frequency estimation technique based on the DFT, could be produce the gain error in accuracy. To meet the requirements for high accuracy, recently Wavelet transforms and analysis are receiving new attention. The Wavelet analysis is possible to calculate the time-frequency analysis which is easy to obtain frequency information of signals. However, it is difficult to apply in real-time implementation because of heavy computation burdens. Nowadays, the computational methods using the Wavelet function and transformation techniques have been searched on these fields. In this paper, we apply the Recursive Discrete Wavelet Transform (RDWT) for the frequency estimation. In order to evaluate performance of the proposed technique, the user-defined arbitrary waveforms are used.

• Proceedings of the KIEE Conference
• /
• 2002.07a
• /
• pp.108-110
• /
• 2002

In this paper, a fault location algorithm is suggested for line to line faults in distribution networks. Conventional fault location algorithms use the symmetrical component transformation, a very useful tool for transmission network analysis. However, its application is restricted to balanced network only. Distribution networks are, in general, operated in unbalanced manners, therefore, conventional methods cannot be applied directly, which is the reason why there are few research results on fault location in distribution networks. Especially, the line to line fault is considered as a more difficult subject. The proposed algorithm uses direct 3-phase circuit analysis, which means it can be applied not only to balanced networks but also to unbalanced networks like distribution a network. The comparisons of simulation results between one of conventional methods and the suggested method are presented to show its effectiveness and accuracy.

• Journal of the Korea Society of Computer and Information
• /
• v.8 no.4
• /
• pp.111-116
• /
• 2003

We proposed a optimal clock period selection algorithm for low power Register Transfer Level design. The proposed algorithm use the way of maintaining the throughput by reducing supply voltage after improve the system performance in order to minimize the power consumption. In this paper, it select the low power to use pipeline in the transformation of architecture. Also, the proposed algorithm is important the clock period selection in order to maximize the resource sharing. however, it execute the optimal clock period selection algorithm. The experiment result is to set the same result AR and HAL filter on the high level benchmark and to reduce in the case of two pipe stage 10.5% and three pipe stage as many as 33.4%.

• The Korean Journal of Applied Statistics
• /
• v.17 no.2
• /
• pp.347-357
• /
• 2004

It is very important to select a split variable in constructing the classification tree. The efficiency of a classification tree algorithm can be evaluated by the variable selection bias and the variable selection power. The C4.5 has largely biased variable selection due to the influence of many distinct values in variable selection and the QUEST has low variable selection power when a continuous predictor variable doesn't deviate from normal distribution. In this thesis, we propose the SRT algorithm which overcomes the drawback of the C4.5 and the QUEST. Simulations were performed to compare the SRT with the C4.5 and the QUEST. As a result, the SRT is characterized with low biased variable selection and robust variable selection power.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.3 no.4
• /
• pp.353-364
• /
• 1998

This paper presents a systematic approach to the modeling of power electronic circuits with systemlongrightarrowlevel simulation l languages. It is shown that a circuit model reduces to one of four basic types according to input/output conditions. The e elementary models for single series components and shunt components are derived which are integrated to develop a m model of given converter circuit. The constraints imposed on the model development-matching input/output conditions a and avoiding algebraic loop-are discussed in relation to the realization example of a buck converter circuit model. It is s shown that the constraints can always be fullfilled by introducing fictitious interface blocks, which is generalized to the c concept of model transformation.