• Journal of Digital Contents Society
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• v.17 no.3
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• pp.173-180
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• 2016

In this paper, a design of transceiver module for real-time wire and wireless robust integrated security system to solve the problem of conventional security system and its transceiver module is proposed. The presented robust integrated security system is designed with RF control unit and wireless transceiver module. A RF controller in transceiver module works as a low-power RF transceiver system. It is designed to use specific bandwidth stored in registers and manipulate RF power of transceiver by accessing the random values of registers. Operation algorithm for RF transceiver module is also presented. The designed transceiver module and the operation algorithm are implemented and verified by experiments.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.9A
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• pp.900-908
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• 2008

This paper presents the implementation and performance test of a Digital IF transceiver for a SDR-based mobile communication base station. The transceiver is reconfigurable to HSDPA and to three profiles, 7 MHz, 3.5 MHz, and 1.75 MHz, each incorporating the IEEE 802.16d WiMAX standard. The transceiver can be reconfigured to other standard profiles through software downloaded onto identical hardware platforms. Experimental results show that the transceiver can be reconfigured to other systems and the performance of the transceiver satisfies the recommended performance criteria of each standard.

• Journal of IKEEE
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• v.12 no.2
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• pp.75-80
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• 2008

There are many researches to reduce power consumption of battery-operated Transceiver for 2.4 GHz smartRF applications. However, components such as processor, memory and LCD based power managements reach the limit of reducing power consumption. To overcome the limit, this research proposes novel low-power Transceiver and transceiver Hardware Design. Experimental results in the real smartRF Transceiver show that the proposed methods can reduce power consumption additionally than component based power managements.

• Journal of information and communication convergence engineering
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• v.6 no.1
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• pp.47-50
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• 2008

A novel high channel efficiency transceiver based on a fast acquisition frequency synthesizer has been designed. The direct digital synthesis (DDS) technique is applied and a simple memory look-up table is incorporated to expedite channel acquisition. The technique simplifies the frequency control process in the transceiver and thus reduces the channel switching time. As a result, the channel efficiency is improved. The designed transceiver is ideal for frequency hopping mobile communication applications.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.11A
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• pp.933-940
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• 2011

In this paper, Ka-band transceiver for road watch radar system is designed and fabricated. The transceiver for road watch radar system is composed of waveform generator, frequency generator. IF transceiver and RF up/down converter. The transceiver especially has 3 different waveform mode for target detection range. The transceiver had over 150 MHz bandwidth in Ka-band and 22 dBm output power. The receiver gain and noise figure was 30 dB and 4 dB respectively. The receive dynamic range was 65.28dB and amplitude imbalance and phase imbalance of I/Q channel was 0.3 dB and 1.8 degree respectively. The transceiver meets the required electrical performances through the individual tests.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.129-131
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• 2011

An 6.4-Gb/s/channel 4-PAM transceiver is designed for a high speed memory application. The asymmetric 4-PAM signaling scheme is proposed to increase the voltage and time margins, and reduces the reference noise effect in a receiver by 33%. To reduce ISI in a channel, 1-tap pre-emphasis of a transmitter is used. The proposed asymmetric 4-PAM transceiver was implemented by using 0.13um 1-poly 6-metal CMOS process with 1.2V supply. The active area and power consumption of 1-charmel transceiver including a PLL are $0.294um^2$ and 6mW, respectively.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2005.11a
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• pp.401-406
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• 2005

The GFSK Transceiver of 400MHz ISM band for data communication is designed and fabricated. To reduce the occupied bandwidth of transmitted signal, the GFSK modulation is selected. The measured results of fabricated transceiver show the data rate of 2400bps at 8.5kHz bandwidth, frequency deviation of less than $\pm$3kHz, sensitivity of -111dBm, SNR of 21.58dB. The fabricated transceiver is satisfied with the regulation of radio wave and has the good performance. This transceiver is well suited for data communication of 400MHz ISM band.

• IEMEK Journal of Embedded Systems and Applications
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• v.4 no.1
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• pp.29-34
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• 2009

In this paper, we design RF transceiver architecture and building blocks for impulse radio UWB system. Impulse radio UWB signal occupies the wide frequency band which is very low transmission power. So, it can minimize the interference effect with the other system. Using UWB technology, we obtain position awareness service. Therefore, we describe the RF transceiver architecture of direct conversion receiver and define the requirement of RF transceiver. Moreover, we implement a prototype RF transceiver based on the presented standard and verify a function and performance through the wireless data communication and ranging test.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39A no.8
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• pp.481-487
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• 2014

In this paper, we have proposed gigabit serial transceiver based on backplane architecture at the satellite communication digital transponder. The transponder supports the full combinational switching function with broadband multi-channel using programmable device - Xilinx space-grade Virtex-5 FPGA. In order to implement the switching function, GTX transceiver solution inside Virtex-5 FPGA is used. Also hardware implementation is simple because of no additional component. In order to use a GTX transceiver, signal integrity(SI) simulation of PCB design is essential. We investigate the characteristics of the S-parameter, eye diagram, channel jitter of GTX transmission line and conform that GTX Transceiver operates without error. Finally the proposed PCB design will be utilized at satellite communication digital transponder EQM-2(Engineering Qualification Model-2).

• ETRI Journal
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• v.30 no.1
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• pp.33-46
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• 2008

This paper presents the experimental results of a low-power low-cost RF transceiver for the 915 MHz band IEEE 802.15.4b standard. Low power and low cost are achieved by optimizing the transceiver architecture and circuit design techniques. The proposed transceiver shares the analog baseband section for both receive and transmit modes to reduce the silicon area. The RF transceiver consumes 11.2 mA in receive mode and 22.5 mA in transmit mode under a supply voltage of 1.8 V, in which 5 mA of quadrature voltage controlled oscillator is included. The proposed transceiver is implemented in a 0.18 ${\mu}m$ CMOS process and occupies 10 $mm^2$ of silicon area.