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http://dx.doi.org/10.7840/kics.2014.39A.8.481

A Gigabit Serial Transceiver Design Using FPGA for Satellite Communication Transponder  

Hong, Keun-Pyo (SAMSUNG THALES Co., Ltd.)
Lee, Jung-Sub (SAMSUNG THALES Co., Ltd.)
Jin, Byoung-Il (SAMSUNG THALES Co., Ltd.)
Ko, Hyun-Suk (Agency for Defense Development)
Seo, Hak-Geum (Agency for Defense Development)
Publication Information
The Journal of Korean Institute of Communications and Information Sciences / v.39A, no.8, 2014 , pp. 481-487 More about this Journal
Abstract
In this paper, we have proposed gigabit serial transceiver based on backplane architecture at the satellite communication digital transponder. The transponder supports the full combinational switching function with broadband multi-channel using programmable device - Xilinx space-grade Virtex-5 FPGA. In order to implement the switching function, GTX transceiver solution inside Virtex-5 FPGA is used. Also hardware implementation is simple because of no additional component. In order to use a GTX transceiver, signal integrity(SI) simulation of PCB design is essential. We investigate the characteristics of the S-parameter, eye diagram, channel jitter of GTX transmission line and conform that GTX Transceiver operates without error. Finally the proposed PCB design will be utilized at satellite communication digital transponder EQM-2(Engineering Qualification Model-2).
Keywords
Satellite Communication Transponder; Serial Transceiver; FPGA; Signal Integrity; Backplane;
Citations & Related Records
Times Cited By KSCI : 2  (Citation Analysis)
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