• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 2005년도 ICCAS
• /
• pp.782-785
• /
• 2005

This article introduces technique to reduce harmonic by using the $5^{th}$ and $7^{th}$ harmonic tune filter and line reactor in the comparison to the technique of intervening firing method at the pulse of the 6-pulse phase-controlled converter in every 1/6 period. The design of the technique introduced in this article is to reduce the harmonic distortion of the current and the voltage resulted from three-phase thyristor phase-controlled converter. The waveform obtained from the experiment was analyzed on the spectrum of the current, voltage and the total harmonic distortion. The double firing method causes zero vectors of output voltage and input current. Designing the mechanism of the converter based on the idea of Park Vector Theory, the number of harmonic distortion in the intervening firing method were compared to those in normal firing method.

• 전력전자학회논문지
• /
• 제22권1호
• /
• pp.67-74
• /
• 2017

This study proposes a novel random pulse-width modulation (PWM) technique with a constant switching frequency utilizing a random offset voltage. The proposed PWM technique spreads switching harmonics by varying the position of an active voltage vector without a switching frequency variation. The implementation of the proposed PWM technique is simple because it does not require additional hardware and complex algorithm. The proposed random PWM technique is compared with the conventional PWM technique on the factors of harmonic spectrum, total harmonic distortion, and harmonic spread factor to confirm the harmonic spread effect. The validity of the proposed method is verified by simulations and experiments on a three-phase inverter drive system.

• Journal of Power Electronics
• /
• 제15권4호
• /
• pp.964-973
• /
• 2015

This paper presents a simple approach for the selective harmonic elimination (SHE) of multilevel inverter based on the transistor-clamped H-bridge (TCHB) family. The SHE modulation is derived from the sinusoidal voltage-angle equal criteria corresponding to the optimized switching angles. The switching angles are computed offline by solving transcendental non-linear equations characterizing the harmonic contents using the Newton-Raphson method to produce an optimum stepped output. Simulation and experimental tests are conducted for verification of the analytical solutions. An Altera DE2 field-programmable gate array (FPGA) board is used as the digital controller device in order to verify the proposed SHE modulation in real-time applications. An analysis of the voltage total harmonic distortion (THD) has been obtained for multiple output voltage cases. In terms of the THD, the results showed that the higher the number of output levels, the lower the THD due to an increase number of harmonic orders being eliminated.

• Journal of Power Electronics
• /
• 제18권6호
• /
• pp.1889-1900
• /
• 2018

Harmonic current mitigation is vital in power distribution networks owing to the inflow of nonlinear loads, distributed generation, and renewable energy sources. The active power filter (APF) is the current electrical equipment that can dynamically compensate for harmonic distortion and eliminate asymmetrical loads. The compensation performance of an APF largely depends on the control strategy applied to the voltage source inverter (VSI). Model predictive control (MPC) has been demonstrated to be one of the effective control approaches to providing fast dynamic responses. This approach covers different types of power converters due to its several advantages, such as flexible control scheme and simple inclusion of nonlinearities and constraints within the controller design. In this study, a finite control set-MPC technique is proposed for the control of VSIs. Unlike conventional control methods, the proposed technique uses a discrete time model of the shunt APF to predict the future behavior of harmonic currents and determine the cost function so as to optimize current errors through the selection of appropriate switching states. The viability of this strategy in terms of harmonic mitigation is verified in MATLAB/Simulink. Experimental results show that MPC performs well in terms of reduced total harmonic distortion and is effective in APFs.

• 대한전기학회논문지:전력기술부문A
• /
• 제53권7호
• /
• pp.389-396
• /
• 2004

This paper introduces a new algorithm to calculate distortion power using complex THD(Total Harmonic Distortion) index. The proposed algorithm involves FFT(Fast Fourier Transform) to compute real and imaginary THDs of voltage and current. Case studies are presented to show the availability of the proposed method.

• 전기학회논문지
• /
• 제61권10호
• /
• pp.1554-1560
• /
• 2012

In this paper, the even harmonic current(2nd, 4th, 6th, 8th) of the arc fault current and normal current were measured in computer load and analyzed. The BPF with GIC was developed to detection of harmonic, the exact center frequency and a high degree of sharpness could be easily obtained. The total even harmonic distortion due to series arc fault in computer load was 31.2%, this value was increased 3.9 times better than the total even harmonic distortion of normal current. The results of analysis of arc fault current RMS variation rate and Peak variation rate per half-cycle, The RMS average variation rate are as follows ; the 2nd harmonic was 0.24, the 4th harmonic was 0.15, the 6th harmonic was 0.19, the 8th harmonic was 0.25, respectively. The Peak average variation rate are as follows ; the 2nd harmonic was 0.19, the 4th harmonic was 0.12, the 6th harmonic was 0.13, the 8th harmonic was 0.15, respectively. The results of this analysis utilize data to detect of series arc fault on wiring of computer load.

• Journal of Electrical Engineering and Technology
• /
• 제13권2호
• /
• pp.711-721
• /
• 2018

This paper presents a single-phase asymmetric half-bridge cascaded multilevel inverter based series active power filter (SAPF) for harmonic voltage compensation. The effect of level number on performance of the proposed SAPF is examined in terms of total harmonic distortion (THD) and system efficiency. Besides, the relationship between the level number and the number of switching device are compared with the other multilevel inverter topologies used in APF applications. The paper is also aimed to demonstrate the capability of the SAPF for compensating harmonic voltages alone, without using a passive power filter (PPF). To obtain the required output voltage, a new switching algorithm is developed. The proposed SAPF with levels of 7, 15 and 31 is used in both simulation and experimental studies and the harmonic voltages of the load connected to the point of common coupling (PCC) is compensated under two different loading conditions. Furthermore, very high system efficiency values such as 98.74% and 96.84% are measured in the experimental studies and all THD values are brought into compliance with the IEEE-519 Standard. As a result, by increasing the level number of the inverter, lower THD values can be obtained even under high harmonic distortion levels while system efficiency almost remains the same.

• 한국정밀공학회:학술대회논문집
• /
• 한국정밀공학회 2010년도 추계학술대회 논문집
• /
• pp.689-690
• /
• 2010

• 전기전자학회논문지
• /
• 제27권3호
• /
• pp.319-326
• /
• 2023

본 논문에서는 단상 전압 소스 인버터 (VSIs)의 강인한 출력 전압 제어를 위한 디지털 제어기 구현과 총 고조파 왜곡(T.H.D.v) 분석을 포함한 시뮬레이션 및 실험 결과를 제시한다. 일반적으로 VSI는 내부 루프의 전류 제어기에 비례 적분(PI) 제어기를 사용하고 외부 루프의 전압 제어기에 비례 공진 (PR) 제어기가 사용된다. 그러나, 비선형 부하에서 여전히 3차, 5차 및 7차와 같은 고차 고조파 왜곡이 발생한다. 따라서 본 논문에서는 고조파 왜곡을 억제하기 위해 홀수 고조파 주파수에 대한 공진 제어기를 포함한 비례 다중 공진 (PMR) 제어기를 제안한다. VSI 플랜트용 컨트롤러의 주파수 응답을 분석하고 PMR 컨트롤러를 설계합니다. 시뮬레이션을 통해 PI와 PMR을 전압 제어기로 사용할 때 출력 전압의 총 고조파 왜곡 특성을 비교 검증합니다. 선형 및 비선형 하중 조건이 모두 고려되었습니다. 마지막으로 PMR 제어기를 3kW급 VSIs 프로토 타입에 적용하여 그 유효성을 입증하였다.

• Journal of Power Electronics
• /
• 제13권4호
• /
• pp.712-718
• /
• 2013

This paper proposes a control method for reducing the total harmonic distortion (THD) of the grid current of three-phase grid-connected inverter systems when the grid voltage is distorted. The THD of the grid current caused by grid voltage harmonics is derived by considering the phase delay and magnitude attenuation due to the hardware low-pass filter (LPF). The Cauchy-Schwarz inequality theory is used in order to search more easily for the minimum point of the THD. Both the gain and angle of the compensation voltage at the minimum point of the THD of the grid current are derived with the variation of cut-off frequencies of the hardware LPF. Simulation and experimental results show the validity of the proposed control methods.