• Title/Summary/Keyword: Topology Analysis

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Topology Optimization of Reinforcement Pattern for Pressure-Explosion Proof Enclosure Door in Semiconductor Manufacturing Process (위상최적화 기법을 이용한 반도체 공정용 압력방폭형 외함 도어의 보강 패턴 최적화)

  • Yeong Sang Kim;Dong Seok Shin;Euy Sik Jeon
    • Journal of the Semiconductor & Display Technology
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    • v.22 no.2
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    • pp.56-63
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    • 2023
  • This paper presents a method using finite element analysis and topology optimization to address the issue of overdesign in pressure-explosion proof enclosure doors for semiconductor manufacturing processes. The design conducted in this paper focuses on the pattern design of the enclosure door and its fixation components. The process consists of a solid-filled model, a topology optimization model, and a post-processing model. By applying environmental conditions to each model and comparing the maximum displacement, maximum equivalent stress, and weight values, it was confirmed that a reduction of about 13% in weight is achievable.

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A Study on Optimal Spot-weld Layout Design of the Car Body Structure Using Topology Optimization (위상최적설계를 이용한 차체 점용접 배치 최적화 연구)

  • Kim, S.R.;Lee, C.W.;Kim, Mun-Yeong;Kim, C.M.;Yim, H.J.
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2012.04a
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    • pp.361-366
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    • 2012
  • In this paper, we propose the efficient technique that reduces the number of spot-welds and increases the structural rigidity by using the topology optimization technique. Eigen value analysis is used to evaluate the rigidity of the optimized model. As a first step, the topology optimization is performed to find optimal spot-weld distributions. In this study, the design objective is to maximize the weighted frequencies. The volume fractions of the weld components are used as design constraints, and also the densities of each element in the individual design space are used as design variables. And then, to consider the possibility of spot-weld failure, the contribution rate analysis was performed by using the orthogonal array method of DOE. The spot-welds in the rear panel part are reinforced according to estimation results of the contribution rate analysis. Finally, we obtained optimized spot-weld layout model which has the reduced number of spot-welds and the improved dynamic stiffness.

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10kW DC/DC Converter using Modified Series Loaded Resonant Topology (향상된 직렬 부하 공진형 컨버터 토폴로지를 이용한 10kW DC/DC 컨버터)

  • Ahn, Suk-Ho;Gong, Ji Woong;Jang, Sung-Roc;Ryoo, Hong-Je
    • Proceedings of the KIPE Conference
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    • 2012.07a
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    • pp.215-216
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    • 2012
  • This paper proposes a modified converter topology from the existing loaded resonant converter and describe the development of 10kW(50~500V, 0~ 50A) DC/DC Converter using the proposed topology. The suggested converter, which revised the topology of the converter operating on the CCM(Continuous Conduction Mode) (above resonance), has the advantage of enhancing the efficiency of rated load operation by rapidly increasing the primary side resonant current and by improving the resonance current in a trapezoid shape. The proposed topology is described with analysis of operating mode and designed using PSpice simulation and the points on design to consider when implementing the topology are described. It is verified that the advantages of the proposed topology centered on rated load are effectively highlighted. Experimental results carried out at different condition and its results shows 98.5% efficiency at full load condition.

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Structural Topology Optimization Using Two-level Dynamic Condensation Scheme (2단계 동적 축소법을 적용한 구조물의 위상 최적 설계)

  • Park Soo-Hyun;Kim Hyun-Gi;Cho Maeng-Hyo
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.19 no.2 s.72
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    • pp.213-219
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    • 2006
  • Topology optimization problem requires numerous repeated evaluations of objective function and design sensitivity for elements within design domain with various density distributions. The recently proposed two-level condensation scheme(TLCS) is very promising for the construction of reduced system and for an accurate and efficient analysis concerned about eigenvalue and dynamic problems. We used the two-level dynamic condensation scheme for the analysis and sensitivity computation part in the structural topology optimization problem. The results of the topology optimization for the reduced system show the TLCS provides high accuracy and computation efficiency compared to the full scale system within engineering accuracy.

SHAPE DESIGN FOR DISC OF A DOUBLE-ECCENTRIC BUTTERFLY VALVE USING THE TOPOLOGY OPTIMIZATION TECHNIQUE (위상최적설계 기법을 이용한 이중편심 버터플라이 밸브의 디스크에 대한 형상설계)

  • Yang, S.M.;Baek, S.H.;Kang, S.
    • Journal of computational fluids engineering
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    • v.17 no.1
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    • pp.61-69
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    • 2012
  • In this paper, the shape design process is briefly discussed emphasizing the use of topology optimization in the conceptual design stage. The basic idea is to view feasible domains for sensitivity region concepts. In this method, the main process consists of two steps: as the design moves further inside the feasible domain using Taguchi method, and thus becoming more successful topology optimization, the sensitivity region becomes larger. In designing a double-eccentric butterfly valve, related to hydrodynamic performance and disc structure, are discussed where the use of topology optimization has proven to dramatically improve an existing design and significantly decrease the development time of a shape design. CFD analysis results demonstrate the validity of this approach.

Implementation of the PNNI Routing Simulator for Analyze Topology Aggregation (Topology Aggregation 분석을 위한 PNNI 라우팅 시물레이터 구현)

  • Kim, Byeon-Gon;Kim, Gwan-Ung;Jeong, Gwang-Il;Sin, Hyeon-Sun;Jeong, Gyeong-Taek;Jeon, Byeong-Sil
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.6
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    • pp.259-267
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    • 2002
  • In this paper, we focus on comparison and analysis of performance for existing Topology Aggregation algorithm. For these, we designed and implemented PNNI routing simulator which contain various TA schemes, and evaluate performance of TA schemes by this simulator. The PNNI 1.0 specification of the ATM Forum is recommended that hierarchical routing protocol and topology information is aggregated in the network constructed hierarchically Aggregating topology information is known as TA(Topology Aggregation) and TA is very important for scalability and security in network. Therefore, the performance of PNNI network would vary with TA schemes and routing algorithm. PNNI routing simulator can be applied to develope Routing algorithm and TA algorithm and can be develope these algorithms in short period.

Reliability-Based Topology Optimization with Uncertainties

  • Kim Chwa-Il;Wang Se-Myung;Bae Kyoung-Ryun;Moon Hee-Gon;Choi Kyung-K.
    • Journal of Mechanical Science and Technology
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    • v.20 no.4
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    • pp.494-504
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    • 2006
  • This research proposes a reliability-based topology optimization (RBTO) using the finite element method. RBTO is a topology optimization based on probabilistic (or reliability) constraints. Young's modulus, thickness, and loading are considered as the uncertain variables and RBTO is applied to static and eigenvalue problems. The RBTO problems are formulated and a sensitivity analysis is performed. In order to compute probability constraints, two methods-RIA and PMA-are used. Several examples show the effectiveness of the proposed method by comparing the classical safety factor method.

Design and Control of Modified Switched Inductor-ZSI (변형 SL-ZSI의 설계 및 제어)

  • Vu, Ho-Anh;Chun, Tae-Won;Lee, Hong-Hee;Kim, Heung-Geun;Nho, Eui-Cheol
    • Proceedings of the KIPE Conference
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    • 2013.11a
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    • pp.105-106
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    • 2013
  • This paper proposes a new topology with active switched-capacitor and switched-inductor impedance network, which can obtain a high boost factor with small shoot-through time. The proposed topology uses an active switched capacitor and switched-inductor impedance network in order to couple the main circuit and input dc source for boosting the output voltage. The proposed topology contains all advantages of the classical Z-source inverter. Comparing with other topologies, the proposed topology uses lesser component and the voltage boost inversion ability significantly increases. The theoretical analysis, pulse width modulation control strategies, and a comparison with classical ZSI have been given in this paper. Both simulation and experimental results will be presented to verify the advantages of the proposed topology.

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Leonhard Euler, the founder of topology (위상수학의 시조 Euler)

  • Kim, Sang-Wook;Lee, Seung-On
    • Journal for History of Mathematics
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    • v.19 no.1
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    • pp.17-32
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    • 2006
  • Topology began to be studied relatively later than the other branches of mathematics, such as geometry, algebra and analysis. Leonhard Euler is generally considered to be the founder of topology. In this paper we first investigate the beginning of topology and its development and then study Euler's life and his achievements in mathematics.

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A New Z-Source Inverter Topology with High Voltage Boost Ability

  • Trinh, Quoc-Nam;Lee, Hong-Hee
    • Journal of Electrical Engineering and Technology
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    • v.7 no.5
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    • pp.714-723
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    • 2012
  • A new Z-source inverter (ZSI) topology is developed to improve voltage boost ability. The proposed topology is modified from the switched inductor topology by adding some more inductors and diodes into inductor branch to the conventional Z-source network. The modulation methods developed for the conventional ZSI can be easily utilized in the proposed ZSI. The proposed ZSI has an ability to obtain a higher voltage boost ratio compared with the conventional ZSI under the same shoot-through duty ratio. Since a smaller shoot-through duty ratio is required for high voltage boost, the proposed ZSI is able to reduce the voltage stress on Z-source capacitor and inverter-bridge. Theoretical analysis and operating principle of the proposed topology are explicitly described. In addition, the design guideline of the proposed Z-source network as well as the PWM control method to achieve the desired voltage boost factor is also analyzed in detail. The improved performances are validated by both simulation and experiment.