• 제어로봇시스템학회논문지
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• 제18권4호
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• pp.302-307
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• 2012

Real-time systems perform periodic tasks and real-time aperiodic tasks such as alarm processing. Especially the periodic tasks included in control systems such as robots have precedence relationships among them. This paper proposes a new scheduling algorithm based on topological sort and residual time. The precedence relationships among periodic tasks are translated to the priorities of the tasks using topological sort algorithm. During the execution of the system the proposed scheduling algorithm decides on whether or not a newly arrived real-time aperiodic task is accepted based on residual time whenever the aperiodic task such as alarm is arrived. The proposed algorithm is validated using examples.

• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 2007년도 춘계학술대회 학술발표 논문집 제17권 제1호
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• pp.305-308
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• 2007

In this paper we suggest an efficient evolutionary approach based on topological sort techniques for precedence constrained TSPs. The determination of optimal sequence has much to offer to downstream project management and opens up new opportunities for supply chains and logistics. Experimental results show that the suggested approach is a good alternative to locate optimal solution for complicated precedence constrained sequencing as in optimization method for instance.

• 지능정보연구
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• 제17권2호
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• pp.1-22
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• 2011

본 논문에서는 선행제약순서결정문제(Sequencing problem with precedence constraints, SPPC)를 효과적으로 해결하기 위한 적응형 유전알고리즘(Adaptive genetic algorithm, aGA)을 제안한다. aGA에서 는 SPPC를 효과적으로 표현하기 위해 위상정렬에 기초한 표현절차(topological sort-based representation procedure) 를 사용한다. 제안된 aGA는 퍼지로직제어를 이용한 적응형구조를 가지고 있으며, 유전 탐색과정을 통해 교차변이 연산자(Crossover operator)의 비율을 적응적으로 조절한다. 수치예제에서는 다양한 형태의 SPPC를 제시하였으며, 그 실험결과는 제안된 aGA가 기존의 알고리즘보다 우수함을 보여주었다. 결론적으로 말하자면 본 논문에서는 제안된 aGA가 다양한 형태의 SPPC에서 최적해 혹은 최적순서를 발견하는데 아주 효과적이라는 것을 밝혔다.

• 한국CDE학회논문집
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• 제3권4호
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• pp.274-282
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• 1998

A feature is a local shape of a product directly related to the manufacturing process. The feature plays a role of the bridge connecting CAD and CAM. In the process planning for he CAM, information on manufacturing is required. To get the a manufacturing information from CAD dat, we need to recognize features. Once features are recognized, they are used as an input for the process planning. In this paper, we thoroughly investigate the composite features, which are generated by interacting simple features. The simple features in the composite feature usually have precedence relation in terms of process sequence. Based on the reason for the precedence relation, we classify the composite features for the process planning. In addition to the precedence relation, approach direction is used as an input for the process planning. In the process planning, the number of set-up orientations are minimized whole process sequence for the features are generated. We propose a process planning algorithm based on the topological sort and breadth-first search of graphs. The algorithn is verified using sample products.

• 한국경영과학회:학술대회논문집
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• 대한산업공학회/한국경영과학회 2000년도 춘계공동학술대회 논문집
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• pp.48-51
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• 2000

The traveling salesman problem with precedence relations (TSPPR) is harder than general traveling salesman problem. In this paper we propose an efficient genetic algorithm (GA) to solve the TSPPR. The key concept of the proposed genetic algorithm is a topological sort (TS). The results of numerical experiments show that the proposed GA approach produces an optimal solution for the TSPPR.

• 한국경영과학회:학술대회논문집
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• 대한산업공학회/한국경영과학회 2000년도 춘계공동학술대회 논문집
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• pp.405-408
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• 2000

The objective of this paper is to develop a model to integrate process planning and resource planning through analysis of the machine tool selection and operations sequencing problem. The model is formulated as a travelling salesman problem with precedence relations. To solve our model, we also propose an efficient genetic algorithm based on topological sort concept.

• 한국정밀공학회지
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• 제12권11호
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• pp.140-147
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• 1995

This paper deals with conversion from the STL file to the Slice to the Slice cross-sectional information for Stereolithography. The STL file is widely used for Stereolithography, but it is very difficult to convert STL file into Slice file directly. Because it consists of an ordered list of triangular net without any topological information other than the orientation of each facet. So, The system is accomplished by data flow through several intermediate stages such as Reference. SL1. .SL2L. .SL3. and .SLC file. The data processing is performed in 5 steps: 1) Create a Reference file including common information. 2) Modify STL file within the effective range of SL machine. 3) Calculate a point of intersection between plane equation and line equation. 4) Sort z values in ascending order using quick sort algorithm. 5) Search the adjacent points and formulate a closed loop usingsingly linked linear list. The system is developed by using Borland C++ 3.1 compiler in the environment of Pentium PC, and verified to be satisfactory by making some prototypes of electric household appliances.

• Management Science and Financial Engineering
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• 제13권1호
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• pp.121-126
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• 2007

Among many graphs, directed acyclic graph(DAG) attracts many researchers due to its nice property of existence of topological sort. In some classic graph problems, it is known that, if we use the aforementioned property, then much efficient algorithms can be generated. So, in this paper, new algorithm for the all-pairs shortest path problem in a DAG is proposed. While the algorithm performing the iteration, it identifies the set of essential arcs which requires in a shortest path. So, the proposed algorithm has a running time of $O(m^*n+m)$, where m, n and $m^*$ denote the number of arcs, number of node, and the number of essential arcs in a DAG, respectively.

• 한국멀티미디어학회논문지
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• 제17권6호
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• pp.725-732
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• 2014

The Pancake graph is node symmetric and useful interconnection network in the field of data sorting algorithm. The Half Pancake graph is a new interconnection network that reduces the degree of the Pancake graph by approximately half and improves the network cost of the Pancake graph. In this paper, we analyze topological properties of the Half Pancake graph $HP_n$. Fist, we prove that $HP_n$ has maximally fault tolerance and recursive scalability. In addition, we show that in $HP_n$, there are isomorphic graphs of low-dimensional $HP_n$. Also, we propose that the Bubblesort $B_n$ can be embedded into Half Pancake $HP_n$ with dilation 5, expansion 1. These results mean that various algorithms designed for the Pancake graph and the Bubble sort graph can be executed on $HP_n$ efficiently.

• 한국건설관리학회논문집
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• 제23권2호
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• pp.33-44
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• 2022

시공단계의 BIM 활용 시 대표적인 기능은 4D시스템에 의한 공정 시뮬레이션 기능을 들수 있다. 4D시뮬레이션을 위해서는 공정 생성 후 공정별 3D모델의 연동과정이 필수적으로 요구된다. 설계단계에 작성된 3D모델은 공정 정보를 고려하지 않으므로 시공단계 적용을 위한 공정 정보의 생성과 3D모델의 연동과정에는 실무적 애로사항이 존재한다. 본 연구에서는 설계단계에 작성된 3D모델에서 HDBSCAN 알고리즘을 이용하여 시공단계의 공정 정보를 추출한 후에 위상정렬 알고리즘 적용으로 선후행관계를 파악하고 공정정보를 자동으로 생성하는 방법론을 제시한다. 생성된 공정 정보는 설계 3D모델을 기반으로 생성되었으므로, 4D시스템에서 공정과 3D모델간의 공통 매개변수에 의해 상호간 자동 연동되는 정보로 활용되어 4D시스템의 실무적 활용성을 배가할 수 있다. 제시된 방법론은 4개 교량에 적용하여 공정 정보 생성결과를 확인하였고, 4D시스템에 적용하여 공정과 3D모델 연동과정의 간편화를 확인하였다.