• Title/Summary/Keyword: Top oxide layer

Search Result 149, Processing Time 0.027 seconds

The electrical conduction characteristics of the multi-dielectric silicon layer (실리콘 다층절연막의 전기전도 특성)

  • 정윤해;한원열;박영걸
    • Electrical & Electronic Materials
    • /
    • v.7 no.2
    • /
    • pp.145-151
    • /
    • 1994
  • The multi-dielectric layer SiOz/Si3N4/SiO2(ONO) is used to scale down the memory device. In this paper, the change of composition in ONO layer due to the process condition and the conduction mechanism are observed. The composition of the oxide film grown through the oxidation of nitride film is analyzed using auger electron spectroscopy(AES). AES results show that oxygen concentration increases at the interface between oxide and nitride layers as the thickness -of the top oxide layer increases. Results of I-V measurement show that the insulating properties improve as the thickness of the top oxide layer increases. But when the thickness of the nitride layer decreases below 63.angs, insulating peoperties of film 28.angs. of top oxide and film 35.angs. turn over showing that insulating property of film 28.angs. of top oxide is better than that of film 35.angs. of top oxide. This phenomenon of turn over is thought as the result of generation of surface state due to oxygen flow into nitride during oxidation process. As the thickness of the top oxide and nitride increases, the electrical breakdown field increases, but when the thickness of top oxide reaches 35.angs, the same phenomenon of turn over occurs. Optimum film thickness for scaled multi-layer dielectric of memory device SONOS is estimated to be 63.angs. of nitride layer and 28.angs. of top oxide layer. In this case, maximum electrical breakdown field and leakage current are 18.5[MV/cm] and $8{\times}{10^-12}$[A], respectively.

  • PDF

Development of multi-cell flows in the three-layered configuration of oxide layer and their influence on the reactor vessel heating

  • Bae, Ji-Won;Chung, Bum-Jin
    • Nuclear Engineering and Technology
    • /
    • v.51 no.4
    • /
    • pp.996-1007
    • /
    • 2019
  • We investigated the influence of the aspect ratio (H/R) of the oxide layer on the reactor vessel heating in three-layer configuration. Based on the analogy between heat and mass transfers, we performed mass transfer experiments to achieve high Rayleigh numbers ranging from $6.70{\times}10^{10}$ to $7.84{\times}10^{12}$. Two-dimensional (2-D) semi-circular apparatuses having the internal heat source were used whose surfaces of top, bottom and side simulate the interfaces of the oxide layer with the light metal layer, the heavy metal layer, and the reactor vessel, respectively. Multi-cell flow pattern was identified when the H/R was reduced to 0.47 or less, which promoted the downward heat transfer from the oxide layer and possibly mitigated the focusing effect at the upper metallic layer. The top boundary condition greatly affected the natural convection of the oxide layer due to the presence of secondary flows underneath the cold light metal layer.

TEM Study on the HgCdTe/Anodic oxide/ZnS Interfaces (투과전자현미경에 의한 HgCdTe/양극산화막/ZnS 계면 특성에 관한 연구)

  • 정진원;김재묵;왕진석
    • Journal of the Korean Institute of Telematics and Electronics A
    • /
    • v.32A no.9
    • /
    • pp.121-127
    • /
    • 1995
  • We have analyzed the double insulating layer consisting of anodic oxide and ZnS through TEM experiments. The use of double insulating layer for HgCdTe surface passivation is one of the promising passivation method which has been recently studied deeply and the double insulating layer is formed by the evaporation of ZnS on the top of anodic oxide layer grown in H$_{2}$O$_{2}$ electrolyte. The structure of anodic oxide layer on HgCdTe is amorphous but the structure of oxide layer after the evaporation of ZnS has been changed to micro-crystalline. The interface layer of 150.angs. thickness has been found between ZnS and anodic oxide layer and is estimated to be ZnO layer. The results of analysis on the chemical components of ZnS, the interface layer and anodic oxide layer have showed that Zn has diffused into the anodic oxide layer deeply while Hg has been significantly decreased from HgCdTe bulk to the top of oxide layer. The formation of ZnO interface layer and the change of structure of anodic oxide layer after the evaporation of ZnS are estimated to be defects or to induce the defects which might possibly affect the increase of the positive fixed charges shown in C-V measurements of HgCdTe MIS.

  • PDF

Top Emission Organic EL Devices Having Metal-Doped Cathode Interface Layer

  • Kido, Junji
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2002.08a
    • /
    • pp.1081-1081
    • /
    • 2002
  • Top emission organic EL devices were fabricated by using metal-doped cathode interface layer to achieve low drive voltages. Also, facing-targets-type sputtering was used to sputter indium-tin oxide layer on top of organic active layer. The devices fabricated in this study showed reasonably high external quantum efficiency of about 1 % which is comparable to that of bottom-emission-type devices.

  • PDF

The oxidation of silicon nitride layer (실리콘 질화막의 산화)

  • 정양희;이영선;박영걸
    • Electrical & Electronic Materials
    • /
    • v.7 no.3
    • /
    • pp.231-235
    • /
    • 1994
  • The multi-dielectric layer $SiO_2$/$Si_3{N_4}$/$SiO_2$ (ONO) is used to improve charge retention and to scale down the memory device. The nitride layer of MNOS device is oxidize to form ONO system. During the oxidation of the nitride layer, the change of thickness of nitride layer and generation of interface state between nitride layer and top oxide layer occur. In this paper, effects of oxidation of the nitride layer is studied. The decreases of the nitride layer due to oxidation and trapping characteristics of interface state of multi layer dielectric film are investigated through the C-V measurement and F-N tunneling injection experiment using SONOS capacitor structure. Based on the experimental results, carrier trapping model for maximum flatband voltage shift of multi layer dielectric film is proposed and compared with experimental data. As a results of curve fitting, interface trap density between the top oxide and layer is determined as being $5{\times}10^11$~$2{\times}10^12$[$eV^1$$cm^2$].

  • PDF

Fabrication of top gate Graphene Transistor with Atomic Layer Deposited $Al_2O_3$

  • Kalode, Pranav;Seong, Myeong-Mo
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2013.08a
    • /
    • pp.212-212
    • /
    • 2013
  • We fabricate and characterize top gate Graphene transistor using aluminum oxide as a gate insulator by atomic layer deposition (ALD). It is found that due to absence of functional group and dangling bonds, ALD of metal oxide is difficult on Graphene. Here we used 4-mercaptopheneol as a functionalization layer on Graphene to facilitate uniform oxide coverage. Contact angle measurement and Atomic force microscopy were used to confirm uniform oxide coverage on Graphene. Raman spectroscopy revealed that functionalization with 4-mercaptopheneol does not induce any defect peak on Graphene. Our device shows mobility values of 4,000 $cm^2/Vs$ at room temperature which also suggest top gate stack does not significantly increase scattering. The noncovalent functionalization method is non-destructive and can be used to grow ultra-thin dielectric for future Graphene applications.

  • PDF

Study of the Reliability Characteristics of the ONON(oxide-nitride-oxide-nitride) Inter-Poly Dielectrics in the Flash EEPROM cells (플래시 EEPROM 셀에서 ONON(oxide-nitride-oxide-nitride) Inter-Poly 유전체막의 신뢰성 연구)

  • Shin, Bong-Jo;Park, Keun-Hyung
    • Journal of the Korean Institute of Telematics and Electronics D
    • /
    • v.36D no.10
    • /
    • pp.17-22
    • /
    • 1999
  • In this paper, the results of the studies about a new proposal where the ONON(oxide-nitride-oxide-nitride) layer instead of the conventional ONO(oxide-nitride-oxide) layer is used as the IPD(inter-poly-dielectrics) layer to improve the data retention problem in the Flash EEPROM cell, have been discussed. For these studies, the stacked-gate Flash EEPROM cell with an about 10nm thick gate oxide and on ONO or ONON IPD layer have been fabricated. The measurement results have shown that the data retention characteristics of the devices with the ONO IPD layer are significantly degraded with an activation energy of 0.78 eV. which is much lower than the minimum value (1.0 eV) required for the Flash EEPROM cell. This is believed to be due to the partial or whole etching of the top oxide of the IPD layer during the cleaning process performed just prior to the dry oxidation process to grow the gate oxide of the peripheral MOSFET devices. Whereas the data retention characteristics of the devices with the ONON IPD layer have been found to be much (more than 50%) improved with an activation energy of 1.10 eV. This must be because the thin nitride layer on the top oxide layer in the ONON IPD layer protected the top oxide layer from being etched during the cleaning process.

  • PDF

Effects of indium tin oxide top electrode formation conditions on the characteristics of the top emission inverted organic light emitting diodes

  • Kho, Sam-Il;Cho, Dae-Yong;Jung, Dong-Geun
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2002.08a
    • /
    • pp.714-716
    • /
    • 2002
  • Indium tin oxide (ITO) was used as the top anode of top emission inverted organic light emitting diodes (TEIOLEDs). TEIOLEDs were fabricated by deposition of an aluminum bottom cathode, an N,N'-diphenyl-N,N'-bis(3-methylphenyl)-1, 1'-diphenyl-4, 4 1'-diamine (TPD) hole transport layer, a tris-8-hydroxyquinoline aluminum ($Alq_3$) emission layer, and an ITO top anode sequentially. ITO was deposited by r.f. magnetron sputtering without $O_2$ flow during the deposition. After the deposition, the deposited ITO layer was kept under oxygen atmosphere for the oxidation. The characteristics of the TEOILED were affected significantly by the post-deposition oxidation condition.

  • PDF

Study of the New Structure of Inter-Poly Dielectric Film of Flash EEPROM (Flash EEPROM의 Inter-Poly Dielectric 막의 새로운 구조에 관한 연구)

  • Shin, Bong-Jo;Park, Keun-Hyung
    • Journal of the Korean Institute of Telematics and Electronics D
    • /
    • v.36D no.10
    • /
    • pp.9-16
    • /
    • 1999
  • When the conventional IPD (inter-poly-dielctrics) layer with ONO(oxide-nitride-oxide) structure was used in the Flash EEPROM cell, its data retention characteristics were significanfly degraded because the top oxide of the ONO layer was etched off due to the cleaning process used in the gate oxidation process for the peripheral MOSFETs. When the IPD layer with the ONON(oxide-nitride-oxide-nitride) was used there, however, its data retention characteristics were much improved because the top nitride of the ONON layer protected the top oxide from being etched in the cleaning process. For the modelling of the data retention characteristics of the Flash EEPROM cell with the ONON IPD layer, the decrease of the threshold voltage cue to the charge loss during the bake was here given by the empirical relation ${\Delta}V_t\; = \;{\beta}t^me^{-ea/kT}$ and the values of the ${\beta}$=184.7, m=0.224, Ea=0.31 eV were obtained with the experimental measurements. The activation energy of 0.31eV implies that the decrease of the threshold voltage by the back was dur to the movement of the trapped electrons inside the inter-oxide nitride layer. On the other hand, the results of the computer simulation using the model were found to be well consistent with the results of the electrical measurements when the thermal budget of the bake was not high. However, the latter was larger then the former in the case of the high thermal budger, This seems to be due to the leakage current generated by the extraction of the electrons with the bake which were injected into the inter-oxide niride later and were trapped there during the programming, and played the role to prevent the leakage current. To prevent the generation of the leakage current, it is required that the inter-oxide nitride layer and the top oxide layer be made as thin and as thick as possible, respectively.

  • PDF

Plasma Treatment Effects on Tungsten Oxide Hole Injection Layer for Application to Inverted Top-Emitting Organic Light-Emitting Diodes

  • Kim, Joo-Hyung;Lee, You-Jong;Jang, Yun-Sung;Kim, Doo-Hyun;Hong, Mun-Pyo
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2009.10a
    • /
    • pp.354-355
    • /
    • 2009
  • In the fabrication of inverted top-emitting organic light emitting diodes (ITOLEDs), the sputtering process is needed for deposition of transparent conducting oxide (TCO) as top anode. Energetic particle bombardment, however, changes the physical properties of underlying layers. In this study, we examined plasma process effects on tungsten oxide ($WO_3$) hole injection layer (HIL). From our results, we suggest the theoretical mechanism to explain the correlation between the physical property changes caused by plasma process on $WO_3$ HIL and degradation of device performances.

  • PDF