• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2002년도 International Meeting on Information Display
• /
• pp.714-716
• /
• 2002

Indium tin oxide (ITO) was used as the top anode of top emission inverted organic light emitting diodes (TEIOLEDs). TEIOLEDs were fabricated by deposition of an aluminum bottom cathode, an N,N'-diphenyl-N,N'-bis(3-methylphenyl)-1, 1'-diphenyl-4, 4 1'-diamine (TPD) hole transport layer, a tris-8-hydroxyquinoline aluminum ($Alq_3$) emission layer, and an ITO top anode sequentially. ITO was deposited by r.f. magnetron sputtering without $O_2$ flow during the deposition. After the deposition, the deposited ITO layer was kept under oxygen atmosphere for the oxidation. The characteristics of the TEOILED were affected significantly by the post-deposition oxidation condition.

• 전자공학회논문지A
• /
• 제32A권9호
• /
• pp.121-127
• /
• 1995

We have analyzed the double insulating layer consisting of anodic oxide and ZnS through TEM experiments. The use of double insulating layer for HgCdTe surface passivation is one of the promising passivation method which has been recently studied deeply and the double insulating layer is formed by the evaporation of ZnS on the top of anodic oxide layer grown in H$_{2}$O$_{2}$ electrolyte. The structure of anodic oxide layer on HgCdTe is amorphous but the structure of oxide layer after the evaporation of ZnS has been changed to micro-crystalline. The interface layer of 150.angs. thickness has been found between ZnS and anodic oxide layer and is estimated to be ZnO layer. The results of analysis on the chemical components of ZnS, the interface layer and anodic oxide layer have showed that Zn has diffused into the anodic oxide layer deeply while Hg has been significantly decreased from HgCdTe bulk to the top of oxide layer. The formation of ZnO interface layer and the change of structure of anodic oxide layer after the evaporation of ZnS are estimated to be defects or to induce the defects which might possibly affect the increase of the positive fixed charges shown in C-V measurements of HgCdTe MIS.

• 대한금속재료학회지
• /
• 제46권6호
• /
• pp.363-369
• /
• 2008

Effects of top coat morphology and thickness on thermal fatigue behavior of thermal barrier coatings (TBC) were investigated in this study. Thermal fatigue tests were conducted on three coating specimens with different top coat morphology and thickness, and then the test data were compared via microstructures, cycles to failure, and fracture surfaces. In the air plasma spray specimens (APS1, APS2), top coat were 200 and $300{\mu}m$ respectively. The thickness of top coat was about $700{\mu}m$ in the perpendicular cracked specimen (PCS). Under thermal fatigue condition at $1,100^{\circ}C$, the cycles to top coat failure of APS1, APS2, and PCS were 350, 560 and 480 cycles, respectively. The cracks were initiated at the interface of top coat and thermally grown oxide (TGO) and propagated into TGO or top coat as the number of thermal fatigue cycles increased. For the PCS specimen, additive cracks were initiated and propagated at the starting points of perpendicular cracks in the top coat. Also, the thickness of TGO and the decrease of aluminium concentration in bond coat do not affect the cycles to failure.

• E2M - 전기 전자와 첨단 소재
• /
• 제9권5호
• /
• pp.476-482
• /
• 1996

The multi-dielectric layer SiO$_{2}$/Si$_{3}$N$_{4}$/SiO$_{2}$(ONO) is used to improve electrical capacitance and to scale down the memory device. In this paper, improvement of the capacitance by reducing the bottom oxide thickness in the nitride deposition with load lock(L/L) vacuum system is studied. Bottom oxide thickness under the nitride layer is measured by ellipsometer both in L/L and non-L/L systems. Both results are in the range of 3-10.angs. and 10-15.angs., respectively, independent of the nitride and top oxide thickness. Effective thickness and cell capacitance for SONOS capacitor are in the range of 50-52.angs. and 35-37fF respectively in the case of nitride 70.angs. in L/L vacuum system. Compared with non-L/L system, the bottom oxide thickness in the case of L/L system decreases while cell capacitance increases about 4 fF. The results obtained in this study are also applicable to ONO scaling in the thin bottom oxide region of memory stacked capacitor.

• 전자공학회논문지D
• /
• 제36D권10호
• /
• pp.9-16
• /
• 1999

Flash EEPROM 셀에서 기존의 ONO 구조의 IPD를 사용하면 peripheral MOSFET의 게이트 산화막을 성장할 때에 사용되는 세정 공정을 인하여 ONO 막의 상층 산화막이 식각되어 전하 보존 특성이 크게 열화되었으나 IPD 공정에 ONON 막을 사용하면 그 세정 공정시에 상층 질화막이 상층 산호막이 식각되는 것을 방지시켜 줌으로 전하보존 특성이 크게 개선되었다. ONON IPD 막을 갖고 있는 Flash EEPROM 셀의 전화 보존 특성의 모델링을 위하여 여기서는 굽는(bake) 동안의 전하 손실로 인한 문턱전압 감소의 실험식으로 ${\Delta}V_t\; = \;{\beta}t^me^{-ea/kT}$을 사용하였으며, 측정 결과 ${\beta}$=184.7, m=0.224, Ea=0.31 eV의 값을 얻었다. 이러한 0.31 eV의 활성화 에너지 값은 굽기로 인한 문턱전압의 감소가 층간 질화막 내에서의 트립된 전자들의 이동에 의한 것임을 암시하고 있다. 한편, 그 모델을 사용한 전사 모사의 결과는 굽기의 thermal budget이 낮은 경우에 실험치와 잘 일치하였으나, 반면에 높은 경우에는 측정치가 전사 모사의 결과보다 훨씬 더 크게 나타났다. 이는 thermal budge가 높은 경우에는 프로그램시에 층간 질화막 내에 트립되어 누설전류의 흐름을 차단해 주었던 전자들이 빠져나감으로 인하여 터널링에 의한 누설전류가 발생하였기 때문으로 보여졌다. 이러한 누설전류의 발생을 차단하기 위해서는 ONON 막 중에서 층간 질화막의 두께는 가능한 얇게 하고 상층 산화막의 두께는 가능한 두껍게 하는 것이 요구된다.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2002년도 International Meeting on Information Display
• /
• pp.1081-1081
• /
• 2002

Top emission organic EL devices were fabricated by using metal-doped cathode interface layer to achieve low drive voltages. Also, facing-targets-type sputtering was used to sputter indium-tin oxide layer on top of organic active layer. The devices fabricated in this study showed reasonably high external quantum efficiency of about 1 % which is comparable to that of bottom-emission-type devices.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.1
• /
• pp.223-226
• /
• 2003

We propose an improvement method for a $\underline{G}ate$ $\underline{OX}ide(GOX)$ thinning at the edge of $\underline{S}hallow$ $\underline{T}rench$ $\underline{I}solation(STI)$, when STI is adopted to Dual Gate Oxide(DGOX) Process. In the case of SOC(System On-a-Chip), the DGOX process is usually used for realizing both a low and a high voltage parts in one chip. However, it is found that the severe GOX thinning occurs from at STI top edge region and a dent profile exists at the top edge of STI, when conventional DGOX and STI process carried out in high density device chip. In order to overcome this problem, a new DGOX process is tried in this study. And we are able to prevent the GOX thinning by H2 anneal, partially SiN liner skip, and a method which is merged a thick sidewall oxide(S/O) with a SiN pull-back process. Therefore, a good subthreshold characteristics without a double hump is obtained by the prevention of a GOX thinning and a deep dent profile.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2011년도 제40회 동계학술대회 초록집
• /
• pp.9-9
• /
• 2011

There has been strong demand for novel nonvolatile memory technology for low-cost, large-area, and low-power flexible electronics applications. Resistive memories based on metal oxide thin films have been extensively studied for application as next-generation nonvolatile memory devices. However, although the metal oxide-based resistive memories have several advantages, such as good scalability, low-power consumption, and fast switching speed, their application to large-area flexible substrates has been limited due to their material characteristics and necessity of a high-temperature fabrication process. As a promising nonvolatile memory technology for large-area flexible applications, we present a graphene oxide-based memory that can be easily fabricated using a room temperature spin-casting method on flexible substrates and has reliable memory performance in terms of retention and endurance. The microscopic origin of the bipolar resistive switching behaviour was elucidated and is attributed to rupture and formation of conducting filaments at the top amorphous interface layer formed between the graphene oxide film and the top Al metal electrode, via high-resolution transmission electron microscopy and in situ x-ray photoemission spectroscopy. This work provides an important step for developing understanding of the fundamental physics of bipolar resistive switching in graphene oxide films, for the application to future flexible electronics.

• 전자공학회논문지D
• /
• 제36D권10호
• /
• pp.17-22
• /
• 1999

이 논문에서는 플래시 EEPROM 셀에서의 데이터 보존 특성을 개선하기 위해서 IPD(inter-poly-dielectrics) 층을 사용하는 새로운 제안에 관한 연구 결과들을 논의하였다. 이 연구를 위하여 약 10nm 두께의 게이트 산호막을 갖으며 또한 ONO 또는 ONON IPD 층을 갖는 적층형-게이트 플래시 EEPROM 셀들을 제작하였다. 측정 결과를 보면 ONO IPD 층을 갖는 소자들은 데이터 보존 특성이 심각하게 열화 되었으며, 그 특성의 활성화 에너지도 0.78 eV로 플래시 EEPROM 셀을 위하여 요구되는 최소 값(1.0 eV)보다 상당히 낮았다. 이는 구동 소자용 트랜지스터(peripheral MOSFET) 소자들의 게이트 산호막을 형성하기 위한 건열산화 공정 바로 직전에 실시하는 세정 공정 동안 IPD 층의 상층 산화막의 일부 또는 전부가 식각되었기 때문인 것으로 믿어진다. 반면에, ONON IPD 층을 갖는 소자들의 데이터 보존 특성은 상단히 (약 50% 이상) 개선되었으며 활성화 에너지도 1.1 eV인 것으로 나타났다. 이는 IPD 층에서 상층 산화막위에 있는 질화막이 그 세정 공정 동안 산화막이 식각되는 것을 방지해 주기 때문임에 틀림없다.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2010년도 제39회 하계학술대회 초록집
• /
• pp.187-187
• /
• 2010

In this study, we investigated the effect of electrodes on resistance switching of TaOx film. Pt, Ni, TiN, Ti and Al metal electrodes having the different oxidation degree were deposited on TaOx/Pt stack. Unipolar resistance switching behavior in Pt or Ni/TaOx/Pt MIM stacks was investigated, but bipolar resistance switching behavior in TiN, Ti or Al /TaOx/Pt MIM stacks was shown. We investigated that the voltage dependence of capacitance was decreased with higher oxidation degree of metal electrodes. Through the C-V results, we expected that linearity ($\alpha$) and quadratic ($\beta$) coefficient was reduced with an increase of interface layer between top electrode and Tantalum oxide. Transmission Electron Microscope (TEM) images depicted the thickness of interface layer formed with different oxidation degree of top electrode. Unipolar resistance switching behavior shown in lower oxidation degree of top electrode was expected to be generated by the formation of the conducting path in TaOx film. But redox reaction in interface between top electrode and Tantalum oxide may play an important role on bipolar resistance switching behavior exhibited in higher oxidation degree of top electrode. We expected that the resistance switching characteristics were determined by oxidation degree of metal electrodes.