• The Journal of the Korean dental association
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• v.22 no.12 s.187
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• pp.1067-1073
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• 1984

In the treatment of functional orthodontic problems, timing is not an issue. All orthodontists start as soon as the condition is recognized. However, there is an active dialogue concerning treatment timing for structure problems. The major points in contention center around the operator's ability is to control the growth of the facial bones and to maintain post-treatment tooth position through the maturation period (especially when this position was gained by techniques involving arch expansion or distal driving of posterior segments). Factors taken into account to determine the best time of orthodontic treatment include diagnosis, interception, growth rate, patient cooperation, eruptive state and treatment period. With those exceptions of all functional problems, mild dental discrepancies and skeletal deficiencies with a predictably excellent growth potential (early treatment), the period immediately following the eruption of the permanent second molars is the period during which most orthodontic treatment should be initiated. At this time the full volume of tooth substances is present, the individual growth pattern in well established, there are sufficient teeth to receive nearly any type of appliances and the patient can easily tolerate the wearing of appliances.

• Transactions of the Korean Society of Automotive Engineers
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• v.7 no.5
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• pp.9-15
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• 1999

A digital CDI(Capacitive Discharge Ignition) system on small two stroke motorcycle engine was developed in this paper, This CDI system with microprocessor as its main part has more flexible spark timing than the conventional CDI system because of its programmable characteristics. The principle of this digital CDI system and the design methods of hardware and software were presented in this paper, Two stroke small engine was tested to investigate the performance of digital CDI system And also this system was investigated to optimize the engine performance. Also comparison between conventional CDI can provide better spark timing variation than the conventional system. The part and full load test results show that the engine power was increased about 10-20% and fuel consumption was decreased about 10-20% simultaneously. Furthermore, this digital CDI system has simple structure, low cost and very little modification are required. It is a promising technology to substitute for the widely used conventional CDI system.

• The Transactions of the Korea Information Processing Society
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• v.6 no.6
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• pp.1635-1645
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• 1999

In this paper, an intelligent resynthesis technique for timing optimization at the architecture-level has been studied. The proposed technique can remedy the problem which may occur in combinational timing optimization techniques applied to circuits which have the hierarchical subblock structure at the architectural-level. The approach first tries to maintain the original hierarchical subblock while minimizing the longest delay of whole circuit. This paper tries to find a new approach to timing optimization for circuits which have hierarchical structure at architectural-level, and has verified its effectiveness experimentally. We claim its usefulness from the fact that most designers design the circuits hierarchically due to the increase of design complexity.

• Speech Sciences
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• v.11 no.3
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• pp.23-36
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• 2004

Many languages show reverse durational variation between preceding vowel and following voiced/voiceless (lax/tense) consonants. This study investigated the likely effects of phoneme type (tense vs. lax) on the timing structure (duration of syllable, word, phrase and sentence) of Korean. Three rates of speech (fast, normal, slow) applied to stimuli with the target word /a-Ca/ where /C/ is one of /p, p', $p^h$/. The type (tense/lax) of /C/ caused marked inverse durational variations in the two syllables /a/ and /Ca/ and highly different durational ratios between them. Words with /p', $p^h$/ were significantly longer than that with /p/, which contrasts with many other languages where such pairs of words have a similar duration. The differentials between words remained up to the phrase and sentence level, but in general the higher linguistic units did not statistically differ within each level. Thus, the phrase is suggested as a compensatory unit of phoneme type effects in Korean. Different rates did not affect the general tendency. Distribution of time variations (from normal to fast and slow) to each syllable (/a/ and /Ca/) was also observed.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.16 no.2
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• pp.112-119
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• 2007

In order to predict vibration trends occurred during vehicle drive, acceleration data was processed by using data processing algorithm with moving average and Hilbert transform. Specific mode constants of acceleration were obtained under various disturbance. Vehicle velocity, road condition, property of pointing structure were considered as factors which make change of vibration trend in vehicle dynamics. Results of signal processing were compared and analysed. Advanced performance of the timing selection algorithm from this study was verified by using simple equipment comparing with the deflection measurement laser system(Muzzle Reference System).

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.159-160
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• 2006

We present a multiuser synchronization scheme for OFDMA uplink systems. First a new preamble structure is proposed by which timing and frequency offsets estimation is developed. Based on proposed structure a new joint synchronization scheme is presented and the simulation results show that the performance of this scheme don't suffer from the number of users.

• Journal of Positioning, Navigation, and Timing
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• v.3 no.3
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• pp.91-97
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• 2014

A direct RF sampling method refers to a technique that directly converts a passband signal to an intermediate band or a baseband without using a mixer. This method is less complicated than an existing RF receiver because a mixer is not used. It uses digital processing after sampling, and thus can flexibly process signals in a number of bands using software. In this process, it is important to select an appropriate sampling frequency so that a number of signals can be converted to an intermediate band that is easy to process. In this study, going beyond previously studied direct RF sampling frequency selection methods, conditions that need to be additionally considered during receiver design were examined, and the structure of a direct RF sampling receiver that satisfies these conditions was suggested.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.5
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• pp.493-502
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• 2009

In this paper, we compare the performance of initial timing acquisition in direct sequence ultra-wideband(DS-UWB) systems with different transmit pulse shaping filters through extensive computer simulations. Simulation results show that the timing acquisition performance of the DS-UWB system, whose chip rate is 1.32 Gchip/s, employing a rectangular transmit filter is similar to that employing a square root raised cosine(SRRC) filter with an interpolation factor of 4 in the realistic UWB channels(CM1 and CM3) as well as the additive white Gaussian noise(AWGN) channel. Additionally, we present both a 24-parallel digital correlator structure and a 24-parallel processing searcher operating at a 55 MHz system clock, and then briefly discuss the initial timing acquisition procedure. Because we can adopt an 1.32 Gsample/s digital-to-analog(D/A) converter and an 1.32 Gsample/s analog-to-digital(AID) converter in the DS-UWB system by employing the rectangular transmit filter, we have a realistic solution for the DS-UWB chipset development.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.8
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• pp.47-55
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• 2010

In this paper, a timing register architecture using demultiplexer and counter is proposed to reduce the area of the high resolution SAR type analog to digital converter. The area and digital power consumption of the conventional timing register based on the shift register is drastically increased, as the resolution is increased. On the other hand, the proposed architecture results in reduction of the area and the power consumption of the error correction logic of the SAR ADC. This chip is implemented with 0.18 um CMOS process. The area is reduced by 5.4 times and the digital power consumption is minimized compared with the conventional one. The 12 bits SAR ADC shows ENOB of 11 bits, power consumption of 2 mW, and conversion speed of 1 MSPS. The die area is $1 mm{\times}1mm$.

• Journal of the Korea Society for Simulation
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• v.3 no.2
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• pp.1-13
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• 1994

Deep reasoning procedures are model-based, inferring single or multiple causes and/or timing relations from the knowledge of behavior of component models and their causal structure. The overall goal of this paper is to develop an automated deep reasoning methodology that exploits deep knowledge of structure and behavior of a system. We have proceeded by building a software environment that uses such knowledge to reason from advanced symbolic simulation techniques introduced by Chi and Zeigler. Such reasoning system has been implemented and tested on several examples in the domain of performance evaluation, and event-based control.