• Title/Summary/Keyword: Time-slot

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A Hybrid Anti-Collision Protocol using Bit Change Sensing Unit in RFID System (RFID 시스템에서 비트변화감지를 이용한 하이브리드 충돌 방지 프로토콜)

  • Kim, Jeong-Hwan;Kim, Young-Tae;Park, Yong-Soo;Ahn, Kwang-Seon
    • Journal of Internet Computing and Services
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    • v.10 no.2
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    • pp.133-141
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    • 2009
  • A tag collision problem occurs when many tags are placed in a interrogation zone in RFID system. A tag collision problem is one of core issues and various protocols have been proposed to solve the collision problems. Generally tree-based protocols generate unique prefixes and identify tags with them as quick as possible. In this paper, we propose the QT-BCS protocol which decreases the identification time by reducing the number of query-response. The QT-BCS protocol makes a prefixes using time slot and bit change sensing unit. This protocol compares the current bit of tags until the current bit is differ from the previous one. When this occurs, all of the bits scanned so far are transferred to slot-0 and slot-1 depending on the first bit value in Reader. Consequently, this method can reduce the number of queries by tracing prefixes easily. Simulation result shows QT-BCS is more efficient in identifying tags than Query Tree and 4-ary Query Tree protocol.

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Simulation Analysis for a Partial Appointment System of Outpatients in a Private Clinic (개인 병원의 부분 예약제 도입을 위한 시뮬레이션 분석 사례)

  • La, Soonyoung;Jeong, Byung Ho;You, Taiwoo
    • Journal of the Korea Society for Simulation
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    • v.21 no.4
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    • pp.57-64
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    • 2012
  • The waiting time of patients is an important factor related with service quality of a hospital system. An appointment system of patients is not popular, in special, in a private hospital. An appointment system is expected to diversify patients in time and to reduce patient's waiting time. Three appointment rules are suggested and analyzed to compare the waiting time of appointment and walk-in patients using simulation analysis. The results of two way ANOVA show that the time slot of 30 minutes for allocating appointment patients is better than the time slot of 60 minites in view of patient's waiting time. The results of the appointment level 1 also show that the constant pattern rule and the zigzag pattern rule give shorter waiting time for walk-in patient and for appointment patient, respectively.

An Anti-Collision Algorithm with 4-Slot in RFID Systems (RFID 시스템에서 4 슬롯을 이용한 충돌방지 알고리즘)

  • Kim, Yong-Hwan;Kim, Sung-Soo;Ryoo, Myung-Chun;Park, Joon-Ho;Chung, Kyung-Ho
    • Journal of the Korea Society of Computer and Information
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    • v.19 no.12
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    • pp.111-121
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    • 2014
  • In this paper, we propose tree-based hybrid query tree architecture utilizing time slot. 4-Bit Pattern Slot Allocation(4-SL) has a 8-ary tree structure and when tag ID responses according to query of the reader, it applies a digital coding method, the Manchester code, in order to extract the location and the number of collided bits. Also, this algorithm can recognize multiple Tags by single query using 4 fixed time slots. The architecture allows the reader to identify 8 tags at the same time by responding 4 time slots utilizing the first bit($[prefix+1]^{th}$, F ${\in}$ {'0' or '1'}) and bit pattern from second ~ third bits($[prefix+2]^{th}{\sim}[prefix+3]^{th}$, $B_2{\in}$ {"00" or "11"}, $B_1{\in}$ {"01" or "10"}) in tag ID. we analyze worst case of the number of query nodes(prefix) in algorithm to extract delay time for recognizing multiple tags. The identification delay time of the proposed algorithm was based on the number of query-responses and query bits, and was calculated by each algorithm.

Implementation of RFID Baseband system for Sensor Network (센서네트워크용 RFID Baseband 시스템 구현)

  • Lee, Doo Sung;Kim, Sun Hyung
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.4 no.4
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    • pp.9-19
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    • 2008
  • In this paper, it is studied anti-collision algorithm based on the transmission protocol for RFID baseband system of the lSO/IEC 18000-6 Type-C regulation and designed the baseband part of RFID reader system using FPGA. To compensate this weak point of the slot random aloha algorithm which must have a long time to be dumped before deciding an appropriate slot size according to the number of surrounding tag, we suggested how to apply Bit By Bit algorithm to be able to recognize the tag when the tag is clashing. The design of the baseband part in the RFID reader system is accomplish by use of the ISE9.1i and I made an experiment on it targeting Spartan2. Construction verification is measured each block through Logic Analyzer and I can verify it has no error. I also compared and analyzed the performance between proposed algorithm and past algorithm and verified the improvement of performance.

Sensitivity Analysis of Design Parameters for Reduction of Cogging Torque in Brushless DC Motors used for Automobile Part (자동차 부품용 BLDC 모터 내의 코깅 토크 저감을 위한 설계 변수의 민감도 해석)

  • 황상문
    • Transactions of the Korean Society of Automotive Engineers
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    • v.6 no.2
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    • pp.235-243
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    • 1998
  • For motor operation at low speeds and loads, torque pulsation by the cogging torque is often a source of vibration and control difficulty. In this paper, the magnetic field of a motor is calculated by finite element method. The periodic cogging torque is determined using Maxwell stress method and time stepping method, and then decomposed using fourier series expansion, The purpose of this paper is to characterize design parameters on the cogging torque and to design a permanent magnet motor with a cogging torque less vulnerable to vibration, without sacrificing the motor performance. The design parameters include stator slot width, permanent magnet slot width, airgap length and magnetization direction. A new design with a less populated frequency spectrum of the cogging torque is proposed after characterizing individual effect of design parameters. Magnet pole edge shaping, by gradually increasing the cogging torque with reduced higher harmonics.

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WBAN MAC Protocols- Non-Saturation Modeling and Performance Analysis

  • Khan, Pervez;Ullah, Niamat;Kim, Hoon
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.3
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    • pp.1462-1476
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    • 2017
  • The current literature on discrete-time Markov chain (DTMC) based analysis of IEEE 802.15.6 MAC protocols for wireless body area networks (WBANs), do not consider the ACK timeout state, wherein the colliding nodes check the ill fate of their transmissions, while other contending nodes perform backoff check that slot as usual. In this paper, our DTMC model accurately captures the carrier sense multiple access with collision avoidance (CSMA/CA) mechanism of IEEE 802.15.6 medium access control (MAC) and allows the contending nodes performing backoff to utilize the ACK timeout slot during collisions. The compared rigorous results are obtained by considering a non-ideal channel in non-saturation conditions, and CSMA/CA parameters pertaining to UWB PHY of IEEE 802.15.6 MAC protocols.

Performance Evaluation of Access Channel Slot Acquisition in Cellular DS/CDMA Reverse Link

  • Kang, Bub-Joo;Han, Young-Nam
    • ETRI Journal
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    • v.20 no.1
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    • pp.16-27
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    • 1998
  • In this paper, we consider the acquisition performance of an IS-95 reverse link access channel slot as a function of system design parameters such as postdetection integration length and the number of access channel message block repetitons. The uncertainty region of the reverse link spreading codes compared to that of forward link is very small, since the uncertainty region of the reverse link is determined by a cell radius. Thus, the parallel acquisiton technique in the reverse link is more efficient than a serial acquisition technique in terms of implementation and of acquisition time. The parallel acquisition is achieved by a bank of N parallel I/Q noncoherent correlator are analyzed for band-limited noise and the Rayleigh fast fading channel. The detection probability is derived for multiple correct code-phase offsets and multipath fading. The probability of no message error is derived when rake combining, access channel message block combining, and Viterbi decoding are applied. Numerical results provide the acquisition performance for system design parameters such as postdetection integration length and number of access channel message block repetitions in case of a random access on a mobile station.

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Machining of Micro-scale Shapes using Micro-EDM Process (Micro-EDM 공정을 이용한 미세 형상 가공)

  • 김영태;박성준;이상조
    • Journal of the Korean Society for Precision Engineering
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    • v.20 no.9
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    • pp.109-117
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    • 2003
  • With development of high advanced technologies and skills, micro machining techniques also are being more functional and smaller. Some of the recently developed micro machining technologies are micro drilling, micro EDM, WEDG, LBM, micro milling, micro UVM etc. In these micro machining techniques, Micro -EDM is generally used for machining micro holes, pockets, and micro structures in difficult-cut-materials. For machining micro structures, first of all, tool electrode should be fabricated by WEDG process. In micro-EDM, parameters such as peak current, pulse width, duration time are very important to fabricate the tool electrode and micro structures. Developed experimental equipments are composed of RLC circuit with PWM. In this paper, using developed micro EDM machine, the characteristics of micro electro discharge machining are investigated at micro holes, slot, and pocket machining etc. Also the trends of tool wear are investigated in case of hole and slot machining.

VLSI design of a shared multibuffer ATM Switch for throughput enhancement in multicast environments (멀티캐스트 환경에서 향상된 처리율을 갖는 공유 다중 버퍼 ATM스위치의 VLSI 설계)

  • Lee, Jong-Ick;Lee, Moon-Key
    • Proceedings of the IEEK Conference
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    • 2001.06a
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    • pp.383-386
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    • 2001
  • This paper presents a novel multicast architecture for shared multibuffer ATM switch, which is tailored for throughput enhancement in multicast environments. The address queues for multicast cells are separated from those for unicast cells to arbitrate multicast cells independently from unicast cells. Three read cycles are carried out during each cell slot and multicast cells have chances to be read from shared buffer memory(SBM) in the third read cycle provided that the shared memory is not accessed to read a unicast cell. In this architecture, maximum two cells are queued at each fabric output port per time slot and output mask choose only one cell. Extensive simulations are carried out and it shows that the proposed architecture has enhanced throughput comparing with other multicast schemes in shared multibuffer switch architecture.

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Optimal Stator Slot Design of Inverter-Fed Induction Motor for Reduction of Core and Winding Losses (손실 저감을 위한 인버터 구동 유도 전동기의 고정자 슬롯 형상 최적화)

  • Kim, Jae-Woo;Kwon, Byung-Il
    • Proceedings of the KIEE Conference
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    • 2004.04a
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    • pp.86-88
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    • 2004
  • In this paper, optimal stator slot shape of 3-phase inverter-fed induction motor is designed to reduce stator core and winding losses. For the analysis, the F.E.M on 1 phase band periodic condition in stator is coupled with harmonic equivalent circuit. For the optimal design, the conjugate gradient method is used as an optimizing algorithm. The stator core and winding losses are reduced by the design method. The results are verified by those of the time-step finite element analysis.

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