• Title/Summary/Keyword: Time-Amplifier

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Dynamic Modeling and Control of Directional Control Valve Using Piezostack Actuator (압전 작동기를 이용한 방향 제어 밸브의 동적 모델링 및 제어)

  • Jeon, Juncheol;Han, Young-Min;Nguyen, Quoc Hung;Han, Seung-Hun;Choi, Seung-Bok
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2012.10a
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    • pp.331-336
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    • 2012
  • This paper proposes a new type of high-frequency directional valve controlled by the piezostack actuator associated with displacement amplifier. As a first step, a dynamic model of directional valve which can operate at 200 Hz with a flow rate of 12 l/min is derived by considering pressure drop and flow force. As a second step, an appropriate piezostack is selected by considering actuation force as well as field-dependent displacement. Subsequently, in order to control spool displacement and flow rate a proportional-derivative (PD) controller is designed based on the $3^{rd}$-order valve system. Control performances such as sinusoidal trajectory tracking of the spool displacement in time domain are evaluated. In addition, the field-dependent flow rate is also presented to verify the required performance of the valve system.

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Parallel M-band DWT-LMS Algorithm to Improve Convergence Speed of Nonlinear Volterra Equalizer in MQAM System with Nonlinear HPA (비선형 HPA를 가진 M-QAM 시스템에서 비선형 Volterra 등화기의 수렴 속도 향상을 위한 병렬 M-band DWT-LMS 알고리즘)

  • Choi, Yun-Seok;Park, Hyung-Kun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.7C
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    • pp.627-634
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    • 2007
  • When a higher-order modulation scheme (16QAM or 64QAM) is applied to the communications system using the nonlinear high power amplifier (HPA), the performance can be degraded by the nonlinear distortion of the HPA. The nonlinear distortion can be compensated by the adaptive nonlinear Volterra equalizer using the low-complexity LMS algorithm at the receiver. However, the LMS algorithm shows very slow convergence performance. So, in this paper, the parallel M-band discrete wavelet transformed LMS algorithm is proposed in order to improve the convergence speed. Throughout the computer simulations, it is shown that the convergence performance of the proposed method is superior to that of the conventional time-domain and transform-domain LMS algorithms.

A Design of 77 GHz LNA Using 65 nm CMOS Process (65 nm CMOS 공정을 이용한 77 GHz LNA 설계)

  • Kim, Jun-Young;Kim, Seong-Kyun;Cui, Chenglin;Kim, Byung-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.9
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    • pp.915-921
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    • 2013
  • This work presents a 77 GHz low noise amplifier(LNA) for automotive radar systems using 65 nm RF CMOS process. The LNA is composed of three stage common source amplifiers and includes transmission line matching networks. To reduce the time for three dimensional EM simulation, we optimize the transmission line impedance matching network using a pre-built EM library. The proposed compact simulation technique is confirmed by measurement results. The peak gain of the LNA is 10 dB at 77 GHz and input/output return losses are below -10 dB around the design frequency.

Fast Transient Response Techniques for PWM Buck Converter (PWM 방식 벅 컨버터의 빠른 과도응답 기술)

  • Seok, Jinmin;Suh, Jung-Duk;Kong, Bai-Sun
    • Journal of IKEEE
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    • v.20 no.1
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    • pp.103-106
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    • 2016
  • PWM buck converters usually use a type-III error amplifier. Since this amplifier has a big capacitor with slow slew rate, they can generate an unintended large overshoot/undershoot at the output when a large load current change occurs. They can also respond slowly by varying the reference voltage. In order to increase battery lifetime, power supplies require a various range of load current and output voltage. PWM buck converter also should have a characteristic of both fast load response and reference tracking. This paper surveys a few recent techniques for reducing the settling time, and discusses their merits and limitations.

A Study on a RF PA Design and Fabrication for a WiBro BTS with TDD Structure (TDD 방식의 WiBro 기지국용 RF PA 설계 및 제작에 관한 연구)

  • Choi, Doo-Hun;Lee, Bong-Kyun;Yeon, Jong-Hyun;Kim, Kang-San;Choi, Young-Wan
    • 한국정보통신설비학회:학술대회논문집
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    • 2005.08a
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    • pp.124-127
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    • 2005
  • 국내에서는 언제 어디서나 휴대용 단말을 이용하여 저렴한 요금으로 고속의 무선인터넷을 사용할 수 있는 휴대인터넷 서비스를 2006년부터 서비스 할 계획이다. 앞으로 서비스 될 WiBro 휴대인터넷 서비스 방식은 기존 이동통신 방식과 달리 RF 송신 주파수와 수신 주파수가 동일한 TDD (time division duplexing) 방식을 사용한다. WiBro 무선통신 기지국 장비에 있어서도 기존 CDMA 이동통신 기지국 장비에서와 마찬가지로 RF Power Amplifier (PA)가 매우 고가의 핵심 부품이라 할 수 있다. 물론, 기존 FDD (frequency division duplexing) 방식의 CDMA 기지국 PA와 달리 WiBro용 기지국 PA는 TDD 신호를 처리할 수 있는 새로운 기술을 필요로 한다. TDD 방식인 WiBro 기지국용으로 사용할 수 있는 새로운 2.3 GHz 42 W PA를 설계, 제작한 결과를 본 논문에서는 발표하고자 한다.

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A Study on the Acoustic Detection of Partial Discharges in Insulation Oil (유중 부분방전의 음향검출에 관한 연구)

  • Kil, Gyung-Suk;Kim, Sung-Wook;Park, Dae-Won;Kim, Sun-Jae;Song, Jae-Man
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.23 no.1
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    • pp.53-60
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    • 2010
  • This paper dealt with the acoustic detection of partial discharge (PD) in insulation oil for insulation diagnostics of oil immersed transformers. Electrode systems such as needle to plane, plane to plane, and floating were fabricated to simulate some defects in transformers. A wide band acoustic emission(AE) sensor with the frequency ranges of 100 kHz~1 MHz and a narrow band AE sensor with the resonant frequency of 140 kHz were used in the experiment. Also, a decoupler and an amplifier were designed to detect and amplify the acoustic signal only. The decoupler separates acoustic signal from DC source without any distortion, and the amplifier has the gain of 40 dB in frequency ranges of 11 kHz~4 MHz. In the experiment, frequency components and propagation characteristics of acoustic signal were analyzed, and an algorithm of positioning of PD occurrence by the time difference of arrival was proposed. From the results, the frequency components of the acoustic signal exist from 50 kHz to 200 kHz and the positioning error of PD calculated by three AE sensors was within 1%.

Dynamic Modeling and Control of Directional Control Valve Using Piezostack Actuator (압전 작동기를 이용한 방향 제어 밸브의 동적 모델링 및 제어)

  • Jeon, Jun-Cheol;Han, Young-Min;Nguyen, Quoc Hung;Choi, Seung-Bok
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.22 no.10
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    • pp.1020-1026
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    • 2012
  • This paper proposes a new type of high-frequency directional valve controlled by the piezostack actuator associated with displacement amplifier. As a first step, a dynamic model of directional valve which can operate at 200 Hz with a flow rate of 12 litter/min is derived by considering pressure drop and flow force. As a second step, an appropriate piezostack is selected by considering actuation force as well as field-dependent displacement. Subsequently, in order to control spool displacement and flow rate a proportional-derivative(PD) controller is designed based on the 3rd-order valve system. Control performances such as sinusoidal trajectory tracking of the spool displacement in time domain are evaluated. In addition, the field-dependent flow rate is also presented to verify the required performance of the valve system.

Digital Pre-distorter for Communication Transmitters (통신용 송신기의 디지털 Pre-distorter)

  • 한동석;김용정김대진김창주
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.211-214
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    • 1998
  • The high power amplifier (HPA) for broadcasting transmitter systems has nonlinear property in terms of input signal power. Hence, it produces AM/AM and AM/PM modulation to the modulated signal. Therefore, the non-linearity results in bandwidth expansion and nonlinear distortion to in-band signal. In this paper, we propose a simple sain-based predistorter that requires less computational burden and less time for the full initialization of the pre-distorter ROM table.

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A 500MHz 1.1㎱ 32kb SRAM Macro with Selective Bit-line Precharge Scheme (선택적 프리차지 방법을 갖는 500MHz 1.1㎱ 32kb SRAM 마크로 설계)

  • 김세준;장일권곽계달
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.699-702
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    • 1998
  • This paper presents a 500MHz 1.1㎱ 32kb synchronous CMOS SRAM macro using $0.35\mu\textrm{m}$ CMOS technology. In order to operate at high frequency and reduce power dissipation, the designed SRAM macro is realized with optimized decoder, multi-point sense amplifier(MPSA), selective precharge scheme and etc. Optimized decorder and MPSA respectively reduce 50% and 40% of delay time. Also, a selective precharge scheme reduces 80% of power dissipation in that part.

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Design of CMOS OTA-C Integrator with a Wide Linear Input Range

  • Shin, Yun-Tae;Ahn, Joung-Cheol;Shin, Kyoo-Jae;Kim, Dong-Yong
    • Proceedings of the KIEE Conference
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    • 1988.11a
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    • pp.465-468
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    • 1988
  • A n-well CMOS Operational Transconductance Amplifier -C(OTA-C) integrator with a wide linear input range is designed. The circuit designed has superior linearity of input voltage range compared with the conventional source-coupled pair OTA. The OTA developed in this paper is versatile in application: diverse applications are in the fields of linear amplifiers, continuous-time filters, gain control circuits, and analog multipliers, etc..

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