• 한국데이타베이스학회:학술대회논문집
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• 한국데이타베이스학회 1999년도 춘계공동학술대회: 지식경영과 지식공학
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• pp.353-359
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• 1999

We present a matrix-based inference algorithm suitable for electronic commerce applications. For this purpose, an Extended AND-OR Graph (EAOG) was developed with the intention that fast inference process is enabled within the electronic commerce situations. The proposed EAOG inference mechanism has the following three characteristics. 1. Real-time inference: The EAOG inference mechanism is suitable for the real-time inference because its computational mechanism is based on matrix computation. 2. Matrix operation: All the subjective knowledge is delineated in a matrix form. so that inference process can proceed based on the matrix operation which is computationally efficient. 3. Bi-directional inference: Traditional inference method of expert systems is based on either forward chaining or backward chaining which is mutually exclusive in terms of logical process and computational efficiency. However, the proposed EAOG inference mechanism is generically bi-directional without loss of both speed and efficiency. We have proved the validity of our approach with several propositions and an illustrative EC example.

• 한국지능정보시스템학회:학술대회논문집
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• 한국지능정보시스템학회 1999년도 춘계공동학술대회-지식경영과 지식공학
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• pp.353-359
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• 1999

We present a matrix-based inference alorithm suitable for electronic commerce applications. For this purpose, an Extended AND-OR Graph (EAOG) was developed with the intention that fast inference process is enabled within the electronic commerce situations. The proposed EAOG inference mechanism has the following three characteristics. 1. Real-time inference: The EAOG inference mechanism is suitable for the real-time inference because its computational mechanism is based on matric computation.2. Matrix operation: All the subjective knowledge is delineated in a matrix form, so that inference process can proceed based on the matrix operation which is computationally efficient.3. Bi-directional inference: Traditional inference method of expert systems is based on either forward chaining or backward chaining which is mutually exclusive in terms of logical process and exclusive in terms of logical process and computational efficiency. However, the proposed EAOG inference mechanism is generically bi-directional without loss of both speed and efficiency. We have proved the validity of our approach with several propositions and an illustrative EC example.

• 대한전기학회논문지:전력기술부문A
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• 제48권6호
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• pp.781-788
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• 1999

In this paper, an expert system is proposed, which can be effectively applied to the large-scale systems with the diversity time constraints, the objectives and the unfixed system structure. The inference scheme of the expert system have the integrated structure composed of the intuitive inference module and logical inference module in order to support effectively the operating constraints of system. The intuitive inference module is designed using the pattern matching or pattern recognition method in order to search a same or similar pattern under the fixed system structure. On the other hand, the logical inference module is designed as the structure with the multiple inference mode based on the heuristic search method in order to determine the optimal or near optimal control strategies satisfing the time constraints for system events under the unfixed system structure, and in order to use as knowledge generator. Here, inference mode consists of the best-first, the local-minimum tree, the breadth-iterative, the limited search width/time method. Finally, the application results for large-scale distribution SCADA system proves that the inference scheme of the expert system is very effective for the large-scale system. The expert system is implemented in C language for the dynamic mamory allocation method, database interface, compatability.

• 한국지능정보시스템학회:학술대회논문집
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• 한국지능정보시스템학회 1999년도 추계학술대회-지능형 정보기술과 미래조직 Information Technology and Future Organization
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• pp.121-130
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• 1999

The objective of this paper is to apply Extended AND-OR Graph (EAOG)-related techniques to extract knowledge from a specific problem-domain and perform analysis in complicated decision making area. Expert systems use expertise about a specific domain as their primary source of solving problems belonging to that domain. However, such expertise is complicated as well as uncertain, because most knowledge is expressed in causal relationships between concepts or variables. Therefore, if expert systems can be used effectively to provide more intelligent support for decision making in complicated specific problems, it should be equipped with real-time inference mechanism. We develop two kinds of EAOG-driven inference mechanisms(1) EAOG-based forward chaining and (2) EAOG-based backward chaining. and The EAOG method processes the following three characteristics. 1. Real-time inference : The EAOG inference mechanism is suitable for the real-time inference because its computational mechanism is based on matrix computation. 2. Matrix operation : All the subjective knowledge is delineated in a matrix form, so that inference process can proceed based on the matrix operation which is computationally efficient. 3. Bi-directional inference : Traditional inference method of expert systems is based on either forward chaining or backward chaining which is mutually exclusive in terms of logical process and computational efficiency. However, the proposed EAOG inference mechanism is generically bi-directional without loss of both speed and efficiency.

• 스마트미디어저널
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• 제11권2호
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• pp.77-83
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• 2022

뉴로모픽 아키텍처는 스파이킹 신경망(SNN, Spiking Neural Network) 모델을 사용하여, 추론 실험을 통해 스파이크 값이 많이 누적될수록 정확한 결과를 도출한다. 추론 결과가 특정 값으로 수렴할 경우, 추론 실험을 더 진행해도 결과의 변화가 작아 소비 전력이 더 커질 수 있다. 특히, 인공지능 기반 IoT 환경에서는 전력 낭비는 큰 문제가 될 수 있다. 따라서 본 논문에서는 뉴로모픽 아키텍처 환경에서 추론 이미지 노출 시간을 조절하여 추론 시간을 단축함으로써 인공지능 기반 IoT의 전력 낭비를 줄이는 기법을 제안한다. 제안한 기법은 추론 정확도의 변화를 반영하여 다음 추론 이미지 노출 시간을 계산한다. 또한, 추론 정확도의 변화량 반영비율을 계수 값으로 조절할 수 있으며, 다양한 계수 값의 비교 실험을 통해 최적의 계수 값을 찾는다. 제안한 기법은 목표 정확도에 해당하는 추론 이미지 노출 시간은 선형 기법보다 크지만 최종 추론 시간은 선형 기법보다 적다. 제안한 기법의 성능을 측정하고 평가한 결과, 제안한 기법을 적용한 추론 실험이 선형 기법을 적용한 추론 실험보다 최종 노출 시간을 약 90% 단축할 수 있음을 확인한다.

• 지능정보연구
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• 제9권2호
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• pp.19-38
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• 2003

In this research, we propose the mechanism to develop self-evolving expert systems (SEES) based on data mining (DM), fuzzy neural networks (FNN), and relational database (RDB)-driven forward/backward inference engine. Most researchers had tried to develop a text-oriented knowledge base (KB) and inference engine (IE). However, this approach had some limitations such as 1) automatic rule extraction, 2) manipulation of ambiguousness in knowledge, 3) expandability of knowledge base, and 4) speed of inference. To overcome these limitations, knowledge engineers had tried to develop an automatic knowledge extraction mechanism. As a result, the adaptability of the expert systems was improved. Nonetheless, they didn't suggest a hybrid and generalized solution to develop self-evolving expert systems. To this purpose, we propose an automatic knowledge acquisition and composite inference mechanism based on DM, FNN, and RDB-driven inference engine. Our proposed mechanism has five advantages. First, it can extract and reduce the specific domain knowledge from incomplete database by using data mining technology. Second, our proposed mechanism can manipulate the ambiguousness in knowledge by using fuzzy membership functions. Third, it can construct the relational knowledge base and expand the knowledge base unlimitedly with RDBMS (relational database management systems) module. Fourth, our proposed hybrid data mining mechanism can reflect both association rule-based logical inference and complicate fuzzy relationships. Fifth, RDB-driven forward and backward inference time is shorter than the traditional text-oriented inference time.

• 한국전자통신학회논문지
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• 제8권3호
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• pp.397-402
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• 2013

다중센서를 이용한 상황인식에서 시간변화는 고려해야 하는 요소이다. 센서가 감지하여 보고한 정보를 바탕으로 상황추론에 도달하고자 하는 경우, 일정 시간 간격별로 묶어서 검토하는 것이 유용하다. 본 논문에서는 시간경과를 고려하는 클러스터링 기법을 이용한 다중센서 데이터융합을 제안한다. 각 센서별로 일정시간 간격동안 수집되어 보고된 센싱 정보를 묶어 1차 데이터융합을 실시하고 그 결과를 대상으로 다시 2차 데이터융합을 실시하였다. Dempster-Shafer이론을 이용하여 다중센서 데이터융합을 실시하고 그 결과를 분석하여 상황을 추론하는데 시간간격을 기준으로 세분화시켜 평가하고 이것을 다시 융합함으로써 향상된 상황 정보를 추론할 수 있다.

• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 1993년도 Fifth International Fuzzy Systems Association World Congress 93
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• pp.975-976
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• 1993

This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}

• 한국지능시스템학회논문지
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• 제12권1호
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• pp.7-13
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• 2002

퍼지이론의 응용은 대부분 퍼지추론을 이용하는 것이다. 그러나 퍼지추론은 입력변수의 수가 많아지거나 각 입력변수에 많은 수의 퍼지라벨을 설정할 경우 그 추론에 필요한 계산시간이 많아지게 되며 이러한 것은 컴퓨터 연산의 대수곱(arithmetic product)의 수에 의해 결정된다. 더구나 퍼지추론의 응용이 가장 활발한 퍼지제어분야에서는 이러한 추론시간은 실제 시스템에 적용 시 가장 큰 제약조건이 된다. 특히, 마이크로프로세서를 이용하거나 PC-based 제어기를 설계할 때 이러한 추론시간은 매우 중요한 문제가 된다. 본 논문에서는 이러한 추론시간을 효율적으로 줄이기 위해, 즉 추론 시 필요로 하는 곱 연산의 수를 줄이기 위하여 삼각형 소속함수를 이용하는 퍼지시스템에 적용 가능하며 정보의 손실이 발생되지 않는 간단한 고속 퍼지추론 알고리즘을 제안한다. 이것은 퍼지추론 시 입력상태공간의 분할과 간단한 기하학적 해석을 통해 얻어지는 것이며 결과적으로 퍼지규칙의 수를 줄이는 것과 같다.

• 한국시뮬레이션학회:학술대회논문집
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• 한국시뮬레이션학회 1999년도 춘계학술대회 논문집
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• pp.242-250
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• 1999

The objective of this paper is to propose an Extended AND-OR Graph (EAOG)-driven inferential simulation mechanism with which decision makers engaged in electronic commerce (EC) can effectively deal with complicated decision making problem. In the field of traditional expect systems research, AND-OR Graph approach cannot be effectively used in the EC problems in which real-time problem-solving property should be highly required. In this sense, we propose the EAOG inference mechanism for EC problem-solving in which heurisric knowledge necessary for intelligent EC problem-solving can be represented in a form of matrix. The EAOG method possesses the following three characteristics. 1. Realtime inference: The EAOG inference mechanism is suitable for the real-time inference because its computational mechanism is based on matrix computation.2. Matrix operation: All the subjective knowledge is delineated in a matrix form, so that inference process can proceed based on the matrix operation which is computationally efficient.3. Bi-directional inference: Traditional inference method of expert systems is based on either forward chaining or based on either and computational efficiency. However, the proposed EAOG inference mechanism is generically bi-directional without loss of both speed and efficiency.We have proved the validity of our approach with several propositions and an illustrative EC example.