• 조명전기설비학회논문지
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• 제23권12호
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• pp.136-145
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• 2009

고속 철도 추진시스템의 고속화 및 급전시스템의 전력 품질향상을 위한 연구가 현재 활발히 진행되고 있으며 이를 위한 멀티레벨 전력변환기를 적용한 고속전철 추진시스템의 연구가 필요하다. 본 논문은 멀티레벨 전력변환기의 제어기법 및 공간전압벡터 변조기법(Space Vector PWM, SVPWM)의 모델을 제안한다. 단상 컨버터 제어방식으로는 널리 사용되고 있는 순시치 전류제어 방식을 대신하여, 과도상태 개선 및 제어 속응성을 향상시키기 위하여 동기좌표계에서의 전류 제어 방식을 사용한 제어기법을 적용하였으며, 단상 멜티레벨 컨버터 및 3레벨 인버터에 적용되는 SVPWM기법의 시뮬레이션 모델을 제안하고 인버터 축소모델을 통하여 모델링의 타당성을 보인다.

• 전력전자학회논문지
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• 제25권2호
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• pp.127-132
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• 2020

In this study, single-phase and three-level boost converters applied to the photovoltaic system were compared and analyzed in terms of efficiency and power density according to the input voltage and load conditions. For accurate analysis of efficiency, the losses in each device of the single-phase and three-level boost converters were derived using mathematical equations and simulations by using the PSIM thermal module. Then, the losses were compared with the efficiency confirmed through the actual experiments. Results confirmed that the efficiency and power density can be improved by applying the three-level boost converter to the system according to the selection of the switching frequency.

• 전력전자학회논문지
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• 제21권4호
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• pp.312-319
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• 2016

Zero-sequence Circulating Current (ZSCC) flows inevitably in parallel converters that share common DC and AC sources. The ZSCC commonly flowing in all converters increases loss and decreases the overall capacity of parallel converters. This paper proposes a simple and effective ZSCC suppression method based on the Space Vector PWM (SVPWM) with the ZSCC controller. The zero-sequence voltage for the proposed SVPWM is calculated on the basis of the grid voltage and not on the phase voltage references. The limit of the linear modulation region of the converters with the proposed method is analyzed and compared with other methods, thereby proving that the limit of the region can be extended with the proposed method. The effectiveness of the proposed method has been verified through the experimental setup comprising four parallel three-level converters. The ZSCC is confirmed to be well suppressed, and the linear modulation region is extended simultaneously with the proposed method. Moreover, the proposed control method does not require any communication between the converters to suppress the ZSCC unlike other conventional methods.

• Journal of Power Electronics
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• 제18권2호
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• pp.407-417
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• 2018

A novel family of Buck mode three-level direct ac converters with a high frequency link is proposed. These converters can transfer an unsteady high ac voltage with distortion into a regulated sinusoidal voltage with a low THD at the same frequency. The circuit configuration is constituted of a three-level converter, high frequency transformer, cycloconverter, as well as input and output filters. The topological family includes forward, push-pull, half-bridge, and full-bridge modes. In order to achieve a reliable three-level ac-ac conversion, and to overcome the surge voltage and surge current of the cycloconverter, a phase-shifted control strategy is introduced in this paper. A prototype is presented with experimental results to demonstrate that the proposed converters have five advantages including high frequency electrical isolation, lower voltage stress of the power switches, bi-directional power flow, low THD of the output voltage, and a higher input power factor.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2014년도 전력전자학술대회 논문집
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• pp.283-284
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• 2014

In this paper, a comparative analysis of LCL and LLCL filters connected to three-level T-type PWM converters is presented, in which the filter inductor sizes are investigated in view of total harmonic distortion (THD) in grid phase currents. The analysis results are verified by simulation and experiments.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1997년도 전력전자학술대회 논문집
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• pp.352-356
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• 1997

This paper present the design of a novel neural-network (NN) based pulse-width modulation (PWM) techniques for a three-level power converter of electric trains along with nonlinear mapping of essential switching patterns and fault tolerance, which are inherent characteristics of NNs. Considering the importance of safety, power factor and harmonics of electric train power converters, two-level type and three-level type of power converters using NNs are precisely investigated and compared in computer simulation. A computer simulation shows that a new current control scheme provides an improved performance over a fixed-band hysteresis current control in many aspects.

• 전력전자학회논문지
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• 제26권2호
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• pp.96-105
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• 2021

Large-scale power converters consist of series or parallel module combinations. In these modular converter systems, the interleaving technique can be applied to improve capacitor reliability by reducing the ripple of the I/O current in which each module operates as a phase difference. However, when applying the interleaving technique for conventional three-level boost converters, the short-circuit period of the converter can be an obstacle. Such problem is caused by the absence of a low-level inductor of the conventional three-level boost converter. To solve this problem, a three-level boost converter with a low-level inductor is proposed and analyzed to enable interleaved operation. In the proposed circuit, the current ripple of the output capacitor depends on the neutral point connections between the modules. In this study, the ripple current is analyzed by the neutral point connections of the three-level boost converter that has a low-level inductor, and the effectiveness of the proposed circuit is proven by simulation and experiment.

• Journal of Power Electronics
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• 제18권6호
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• pp.1650-1658
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• 2018

Multilevel converters are being widely used in medium-voltage high-power applications including motor drive systems, utility power transmission, and distribution systems. Selective harmonic elimination (SHE) is a well-known modulation method to generate high quality output voltage waveforms. This paper presents a new simple practical method for generating a generalized five-level waveform without selected low order harmonics. This method is based on a phase-shifted expression for the SHE problem, which can analytically calculate the exact values of switching angles and the feasible modulation index range for three-level and five-level waveforms. The proposed method automatically determines the number of transitions between levels and generates proper output waveform without solving complex trigonometric equations. Due to the simplicity of the computational burden, the real-time implementation of the proposed algorithm can be performed by a simple processor. Simulation and experiment results verify the correctness and effectiveness of the proposed method.

• Journal of Power Electronics
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• 제17권4호
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• pp.914-922
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• 2017

Multilevel converters have attracted a lot of attention in recent years. The efficiency parameters of a multilevel converter such as the switching losses and total harmonic distortion (THD) mainly depend on the modulation strategy used to control the converter. Among all of the modulation techniques, the selective harmonic elimination (SHE) method is particularly suitable for high-power applications due to its low switching frequency and high quality output voltage. This paper proposes a new expression for the SHE problem in five-level converters. Based on this new expression, a simple analytical method is introduced to determine the feasible modulation index intervals and to calculate the exact value of the switching angles. For each selected harmonic, this method presents three-level or five-level waveforms according to the value of the modulation index. Furthermore, a flowchart is proposed for the real-time implementation of this analytical method, which can be performed by a simple processor and without the need of any lookup table. The performance of the proposed algorithm is evaluated with several simulation and experimental results for a single phase five-level diode-clamped inverter.

• Journal of Power Electronics
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• 제15권6호
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• pp.1429-1437
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• 2015

A new parallel hybrid soft switching converter with low circulating current losses during the freewheeling state and a low output current ripple is presented in this paper. Two circuit modules are connected in parallel using the interleaved pulse-width modulation scheme to provide more power to the output load and to reduce the output current ripple. Each circuit module includes a three-level converter and a half-bridge converter sharing the same lagging-leg switches. A resonant capacitor is adopted on the primary side of the three-level converter to reduce the circulating current to zero in the freewheeling state. Thus, the high circulating current loss in conventional three-level converters is alleviated. A half-bridge converter is adopted to extend the ZVS range. Therefore, the lagging-leg switches can be turned on under zero voltage switching from light load to full load conditions. The secondary windings of the two converters are connected in series so that the rectified voltage is positive instead of zero during the freewheeling interval. Hence, the output inductance of the three-level converter can be reduced. The circuit configuration, operation principles and circuit characteristics are presented in detail. Experiments based on a 1920W prototype are provided to verify the effectiveness of the proposed converter.