• 제목/요약/키워드: Thin layer

검색결과 5,287건 처리시간 0.034초

비정질 금속 기판상에 증착된 YBCO 박막의 결정성에 대한 CEO$_2$ 완충막의 효과 (Effect of CeO$_2$ buffer layer on the crystallization of YBCO thin film on Hastelloy substrate)

  • 김성민;이상렬
    • 한국초전도학회:학술대회논문집
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    • 한국초전도학회 1999년도 High Temperature Superconductivity Vol.IX
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    • pp.392-396
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    • 1999
  • Superconducting YBa$_2Cu_3O_{7-{\delta}}$(YBCO) thin films were grown on Hastelloy(Ni-Cr-Mo alloys) with CeO$_2$ buffer layer in-situ by pulsed laser deposition in a multi-target processing chamber. To apply superconducting property on power transmission line, we have deposited YBCO thin film on flexible metallic substrate. However, it is difficult to grow the YBCO films on flexible metallic substrates due to both interdiffusion problem between metallic substrate and superconducting overlayers and non-crystallization of YBCO on amorphous substrate. It is necessary to use a buffer layer to overcome the difficulties. We have chosen CeO$_2$ as a buffer layer which has cubic structure of 5.41 ${\AA}$ lattice parameter and only 0.2% of lattice mismatch with 3.82 ${\AA}$ of a-axis lattice parameter of YBCO on [110] direction of CeO$_2$ In order to enhance the crystallization of YBCO films on metallic substrates, we deposited CeO$_2$ buffer layers with varying temperature and 02 pressure. By XRD, it is observed that dominated film orientation is strongly depending on the deposition temperature of CeO$_2$ layer. The dominated orientation of CeO$_2$ buffer layer is changed from (200) to(111) by increasing the deposition temperature and this transition affects the crystallization of YBCO superconducting film on CeO$_2$ buffered Hastelloy.

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펄스 레이저 증착법으로 layer-by-layer 성장시킨 $YBa_{2}Cu_{3}O_{7}$ 박막의 초전도특성 (Superconducting properties of layer-by-layer grown $YBa_{2}Cu_{3}O_{7}$ thin film prepared by pulsed laser deposition)

  • 김인선;임해용;김동호;박용기;박종철
    • 센서학회지
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    • 제7권1호
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    • pp.61-66
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    • 1998
  • C-축으로 배향된 고품질 $YBa_{2}Cu_{3}O_{7}$ 박막을 펄스레이저 증착법으로 $SrTiO_{3}$(100) 기판위에 제작하였다. STO 기판을 고온 산소열처리로 원시세포 높이의 테라스가 발달한 atomic-flat한 표면상태로 가공하였으며, 이 기판위에 최적의 조건에서 증착된 $YBa_{2}Cu_{3}O_{7}$ 박막은 원시세포단위로 층상으로 적층 성장됨을 알 수 있었다. 이러한 박막은 임계온도${\ge}90$ K, 전이폭${\le}0.6$ K, 상온비저항${\sim}300{\mu}{\Omega}cm$, 잔류저항${\sim}0$ 및 임계전류밀도${\sim}4.6{\times}10^{6}A/cm^{2} $의 초전도 특성을 나타내었다.

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Flexibility Improvement of InGaZnO Thin Film Transistors Using Organic/inorganic Hybrid Gate Dielectrics

  • Hwang, B.U.;Kim, D.I.;Jeon, H.S.;Lee, H.J.;Lee, N.E.
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.341-341
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    • 2012
  • Recently, oxide semi-conductor materials have been investigated as promising candidates replacing a-Si:H and poly-Si semiconductor because they have some advantages of a room-temperature process, low-cost, high performance and various applications in flexible and transparent electronics. Particularly, amorphous indium-gallium-zinc-oxide (a-IGZO) is an interesting semiconductor material for use in flexible thin film transistor (TFT) fabrication due to the high carrier mobility and low deposition temperatures. In this work, we demonstrated improvement of flexibility in IGZO TFTs, which were fabricated on polyimide (PI) substrate. At first, a thin poly-4vinyl phenol (PVP) layer was spin coated on PI substrate for making a smooth surface up to 0.3 nm, which was required to form high quality active layer. Then, Ni gate electrode of 100 nm was deposited on the bare PVP layer by e-beam evaporator using a shadow mask. The PVP and $Al_2O_3$ layers with different thicknesses were used for organic/inorganic multi gate dielectric, which were formed by spin coater and atomic layer deposition (ALD), respectively, at $200^{\circ}C$. 70 nm IGZO semiconductor layer and 70 nm Al source/drain electrodes were respectively deposited by RF magnetron sputter and thermal evaporator using shadow masks. Then, IGZO layer was annealed on a hotplate at $200^{\circ}C$ for 1 hour. Standard electrical characteristics of transistors were measured by a semiconductor parameter analyzer at room temperature in the dark and performance of devices then was also evaluated under static and dynamic mechanical deformation. The IGZO TFTs incorporating hybrid gate dielectrics showed a high flexibility compared to the device with single structural gate dielectrics. The effects of mechanical deformation on the TFT characteristics will be discussed in detail.

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고상 성장법을 이용한 실리콘 태양전지 에미터 형성 연구 (A Study on Solid-Phase Epitaxy Emitter in Silicon Solar Cells)

  • 김현호;지광선;배수현;이경동;김성탁;박효민;이헌민;강윤묵;이해석;김동환
    • Current Photovoltaic Research
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    • 제3권3호
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    • pp.80-84
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    • 2015
  • We suggest new emitter formation method using solid-phase epitaxy (SPE); solid-phase epitaxy emitter (SEE). This method expect simplification and cost reduction of process compared with furnace process (POCl3 or BBr3). The solid-phase epitaxy emitter (SEE) deposited a-Si:H layer by radio-frequency plasma-enhanced chemical vapor deposition (RF-PECVD) on substrate (c-Si), then thin layer growth solid-phase epitaxy (SPE) using rapid thermal process (RTP). This is possible in various emitter profile formation through dopant gas ($PH_3$) control at deposited a-Si:H layer. We fabricated solar cell to apply solid-phase epitaxy emitter (SEE). Its performance have an effect on crystallinity of phase transition layer (a-Si to c-Si). We confirmed crystallinity of this with a-Si:H layer thickness and annealing temperature by using raman spectroscopy, spectroscopic ellipsometry and transmission electron microscope. The crystallinity is excellent as the thickness of a-Si layer is thin (~50 nm) and annealing temperature is high (<$900^{\circ}C$). We fabricated a 16.7% solid-phase epitaxy emitter (SEE) cell. We anticipate its performance improvement applying thin tunnel oxide (<2nm).

Soda lime glass기판위의 barrier층$(SiO_2,\;Al_2O_3)$이 ITO박막특성에 미치는 영향 (Effect of ITO thin films characterization by barrier layers$(SiO_2\;and\;Al_2O_3)$ on soda lime glass substrate)

  • 이정민;최병현;지미정;안용태;주병권
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 추계학술대회 논문집
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    • pp.292-292
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    • 2007
  • To apply PDP panel, Soda lime glass(SLG) is cheeper than Non-alkali glass and PD-200 glass but has problems such as low strain temperature and ion diffusion by alkali metal oxide. In this paper suggest the methode that prohibits ion diffusion by deposing barrier layer on SLG. Indium thin oxide(ITO) thin films and barrier layers were prepared on SLG substrate by Rf-magnetron sputtering. These films show a high electrical resistivity and rough uniformity as compared with PD-200 glass due to the alkali ion from the SLG on diffuse to the ITO film by the heat treatment. However these properties can be improved by introducing a barrier layer of $SiO_2\;or\;Al_2O_3$ between ITO film and SLG substrate. The characteristics of films were examined by the 4-point probe, SEM, UV-VIS spectrometer, and X-ray diffraction. GDS analysis confirmed that barrier layer inhibited Na and Ka ion diffusion from SLG. Especially ITO films deposited on the $Al_2O_3$ barrier layer had higher properties than those deposited on the $SiO_2$ barrier layer.

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열처리 조건에 따른 $HfO_2$/Hf/Si 박막의 MOS 커패시터 특성 (Characterization of $HfO_2$/Hf/Si MOS Capacitor with Annealing Condition)

  • 이대갑;도승우;이재성;이용현
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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    • pp.8-9
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    • 2006
  • Hafnium oxide ($HfO_2$) thin films were deposited on p-type (100) silicon wafers by atomic layer deposition (ALD) using TEMAHf and $O_3$. Prior to the deposition of $HfO_2$ films, a thin Hf ($10\;{\AA}$) metal layer was deposited. Deposition temperature of $HfO_2$ thin film was $350^{\circ}C$ and its thickness was $150\;{\AA}$. Samples were then annealed using furnace heating to temperature ranges from 500 to $900^{\circ}C$. The MOS capacitor of round-type was fabricated on Si substrates. Thermally evaporated $3000\;{\AA}$-thick AI was used as top electrode. In this work, We study the interface characterization of $HfO_2$/Hf/Si MOS capacitor depending on annealing temperature. Through AES(Auger Electron Spectroscopy), capacitance-voltage (C-V) and current-voltage (I-V) analysis, the role of Hf layer for the better $HfO_2$/Si interface property was investigated. We found that Hf meta1 layer in our structure effective1y suppressed the generation of interfacial $SiO_2$ layer between $HfO_2$ film and silicon substrate.

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직접 용액 코팅법에 의해 제조한 CuInSe2 에 잔존하는 탄소 불순물층 형성에 관한 연구 (On Formation of Residual Carbon Layer in CuInSe2 Thin Films Formed via direct Solution Coating Process)

  • 안세진;;어영주;곽지혜;윤경훈;조아라
    • Current Photovoltaic Research
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    • 제2권1호
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    • pp.36-39
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    • 2014
  • Formation mechanism of residual carbon layer, frequently observed in the $CuInSe_2$ (CIS) thin film prepared by direct solution coating routes, was investigated in order to find a way to eliminate it. As a model system, a methanol solution with dissolved Cu and In salts, whose viscosity was adjusted by adding ethylcellulose (EC), was chosen. It was found that a double layer, a top metal ion-derived film and bottom EC-derived layer, formed during an air drying step presumably due to different solubility between metal salts and EC in methanol. Consequently, the top metal ion-derived film acts as a barrier layer inhibiting further thermal decomposition of underlying EC, resulting a formation of bottom carbon residue layer.

활성층 두께 및 열처리 온도에 따른 비정질 인듐갈륨징크옥사이드 박막트랜지스터의 전기적 특성 변화 (Electrical Properties Depending on Active Layer Thickness and Annealing Temperature in Amorphous In-Ga-Zn-O Thin-film Transistors)

  • 백찬수;임기조;임동혁;김현후
    • 한국전기전자재료학회논문지
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    • 제25권7호
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    • pp.521-524
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    • 2012
  • We report on variations of electrical properties with different active layer thickness and post-annealing temperature in amorphous In-Ga-Zn-O (IGZO) thin-film transistors (TFTs). In particular, subthreshold swing (SS) of the IGZO-TFTs was improved as increasing the active layer thickness at an given post-annealing temperature, accompanying the negative shift in turn-off voltage. However, as increasing post-annealing temperature, only turn-off voltage was shifted negatively with almost constant SS value. The effect of the active layer thickness and post-annealing temperature on electrical properties, such as SS, field effect mobility and turn-off voltage in IGZO-TFTs has been explained in terms of the variation of trap density in IGZO channel layer and at gate dielectric/IGZO interface.

Substrate Temperature Effects on DC Sputtered Mo thin film

  • Ahn, Heejin;Lee, Dongchan;Um, Youngho
    • Applied Science and Convergence Technology
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    • 제26권1호
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    • pp.11-15
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    • 2017
  • To improve the adhesion of Mo thin film as a back contact material, a DC magnetron sputtering system was used to deposit in the form of a bi-layer on soda-lime glass. Films with low resistivity and good adhesion were obtained from this deposition, even though the two qualities were found be hard to obtain at the same time. The best Mo bi-layer showed a resistivity of $8.13{\times}10^{-4}{\Omega}{\cdot}cm$ at $500^{\circ}C$ and $3.0{\times}10^{-3}\;Torr$. The XRD measurements showed that the crystallites of the films were mainly oriented in the (110) direction, the FE-SEM images revealed that the resistivity of the Mo films decreased with increasing substrate temperature, which temperature reduction is accompanied by an increase of the grain size. These experimental results were analyzed using the Fuchs-Sondheimer theory. Our Mo bi-layer film with better crystallinity and lower resistivity can be suitably used as a back-contact layer for CIGS solar cells.

고효율 및 장수명의 OLED Passivation 기술 개발 (Development of OLED Passivation Method for High efficency and life time)

  • 한진우;김종환;김영환;서대식;김영훈;문대규;한정인
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2005년도 추계학술대회 논문집 Vol.18
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    • pp.267-268
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    • 2005
  • In this paper, the inorganic-organic thin film encapsulation layer was newly adopted to protect the organic layer from moisture and oxygen. Using the electron beam, Sputter and Spin-Coater system, the various kinds of inorganic and organic thin-films were deposited onto the Ethylene Terephthalate(PET) and their interface properties between organic and inorganic layer were investigated. In this investigation, the SiON and Polyimide(PI) layer showed the most suitable properties. Under these conditions, the WVTR(water vapour transition rate) for PET can be reduced from level of 0.57 g/$m^2$/day (bare subtrate) to $1{\times}10^{-5}$ /$m^2$/day after application of a SiON and Polyimide layer. These results indicates that the SiON/PI/SiON/PI/PET barrier coatings have high potential for flexible organic light-emitting diode(OLED) applications.

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